When lazy HiFi context switching is enabled, the system starts with
the HiFi coprocessor disabled. Should the thread use that coprocessor,
it will generate an exception which in turn will enable the coprocessor
and save/restore the HiFi registers as appropriate. When switching
to a new thread, the HiFi coprocessor is again disabled.
For simplicity, there are no restrictions as to which thread is allowed
to use the coprocessor.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
The intent of arch_coprocessors_disable() is to replace
arch_float_disable() in halt_thread() for the FPU will not
always be the only coprocessor that will need to be disabled.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
As the BSA can not be used when lazy HiFi context switching is
used, a more permanent and predictable location in which to store
the registers is required. To this end ...
1. reserve some space in the arch-specific portion of the k_thread
structure for those registers.
2. clear that region when the thread is created.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Splits HiFi sharing into two different models.
1. XTENSA_EAGER_HIFI_SHARING - unconditional save/restore
of the HiFi registers when context switching
2. XTENSA_LAZY_HIFI_SHARING - on demand save/restore of
of the HiFi registers. If a thread does not use the
HiFi registers, they are neither saved nor restored.
To maintain backwards compatibility, the eager model is the
default model when XTENSA_HIFI_SHARING is enabled.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
instead of depending on logging for exceptions and fatal messages, use
macro and dump exceptions if printk is enable with no logging.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
instead of depending on logging for exceptions and fatal messages, use
macro and dump exceptions if printk is enable with no logging.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
instead of depending on logging for exceptions and fatal messages, use
macro and dump exceptions if printk is enable with no logging.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
instead of depending on logging for exceptions and fatal messages, use
macro and dump exceptions if printk is enable with no logging.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
instead of depending on logging for exceptions and fatal messages, use
macro and dump exceptions if printk is enable with no logging.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
instead of depending on logging for exceptions and fatal messages, use
macro and dump exceptions if printk is enable with no logging.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
instead of depending on logging for exceptions and fatal messages, use
macro and dump exceptions if printk is enable with no logging.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
instead of depending on logging for exceptions and fatal messages, use
macro and dump exceptions if printk is enable with no logging.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
ARC was using this method already in a custom way and was different from
all other architectures, lets make this generic.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Just include <zephyr/arch/exception.h> in architecture code. The file
redirects to the correct implementation.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit introduces a new Kconfig choice for configuring the code model
used for compilation.
All three code models specified by the RISC-V ELF psABI specification are
supported: medlow, medany and large.
For RV32, the `medlow` code model is always selected.
For RV64, the `large` code model is selected if the SRAM or kernel VM base
address is greater than or equal to 4 GiB; otherwise, the `medany` code
model is selected.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit introduces the support for the standard Zicntr extension, which
provides hardware counters.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the support for the following new Zc* series compressed
instruction extensions:
Zca - Subset of the C extension without FP loads and stores
Zcb - "Simple" instructions
Zcd - Double-precision floating-point instructions
Zcf - Single-precision floating-point instructions
Zcmp - "Complex" instructions for embedded CPUs
Zcmt - Table jump instructions for embedded CPUs
With the introduction of the Zc* extensions, the C extension now implies
the following Zc* extensions:
* Zca, always
* Zcf if F is specified (RV32 only)
* Zcd if D is specified
The Zc* extensions that are implied by the C extension are not specified in
the GCC `-march` flag because they are redundant and can interfere with the
resolution of the correct multi-lib for the selected architecture unless
the the alternate mappings for the redundant forms are manually specified.
All the implementation details in this commit are based on the Zc* v1.0.0
specification, which is the ratified version.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Add support for CONFIG_ROM_START_OFFSET on ARC processors. Note that the
arc ISA requires vector table offset to be at a 1024 KiB boundary, so
the default ROM_START_OFFSET when using MCUBoot must be increased.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Add CONFIG_ARCH_SUPPORTS_ROM_OFFSET, a convenience Kconfig to indicate
that CONFIG_ROM_START_OFFSET is supported on this architecture
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
z_arm_save_fp_context and z_arm_restore_fp_context
save and restore fpu context regardless of the
CONFIG_FPU_SHARING setting.
This modification is required to support suspend to ram use cases
where save and restore of FPU state is needed to ensure proper bahaviour
after wakeup.
Signed-off-by: Michele Sardo <michele.sardo@st.com>
Added configurable support for L1 cache region operations,
which offers improved performance over line operations.
Added configurable support for SLC (system level cache).
Added support for entire cache operations: flush_all,
invd_all, flush_and_invd_all.
Reviewed-by: Aaron Komisar <aaron.komisar@tandemg.com>
Signed-off-by: Yanir Levin <ylevin@gsitechnology.com>
CONFIG_NATIVE_APPLICATION, which represents the way in which
native_posix and its kin were built, was deprecated in 4.1 after the
introduction of native_sim and CONFIG_NATIVE_LIBRARY.
We remove support for it now for 4.3.
Let's remove the architecture layer adaptation code and cmake support.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add missing call to thread_switched_in for the purpose of tracing.
Fixeszephyrproject-rtos/zephyr#76057
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When LTO is enabled, linker may relocate literal pools out of Thumb LDR
instruction's reach causing "offset out of range" errors while linking.
This commit adds `.ltorg` directive in the inline asm blocks where absolute
addresses are loaded using the `ldr` instructions, in order to ensure that
the literal pool containing the absolute addresses are placed near the
`ldr` instructions.
Note that the `.ltorg` directive is recognised by all toolchains supported
by Zephyr and no toolchain abstraction is provided for now.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Utilize a code spell-checking tool to scan for and correct spelling errors
in `Kconfig` files within the `arch`, `boards`, `kernel`, `modules`,
`samples`, and `share` directory.
Additionally, incorporates a fix recommended by the reviewer.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Floating-Point System ID register (FPSID) = 0x41033094
AArch32 Media and VFP Feature Register 0 (MVFR0) = 0x10110222
AArch32 Media and VFP Feature Register 0 (MVFR1) = 0x1111111
MVFR1 SIMDFMAC, bits [31:28] = 0; FMAC is not supported
Signed-off-by: Simon Maurer <mail@maurer.systems>
The RX linker is using the name "data" for .data region start
which caused the application cannot use "data" for variable
naming globally.
This commit change the name to "__data_region_start" as expected
in the linker_defs.h file
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Update a comment about GDB use of register index and "regno"
parameters. Only some GDB versions use "idx" instead of "regno."
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
To report unavailable registers to the GDB client, the GDB stub has
to return a string like "xx" in the value string.
Signed-off-by: Noah Klayman <noah.klayman@intel.com>
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Move an assignment performed on both "if" branches as the last
operation to after the "if."
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
As per Zephyr guidelines regarding the use of inclusive language, apply
the following replacements:
- s/master/primary/g
- s/slave/secondary/g
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This is an X86 specific option and should not appear as generic debug
option.
Fixeszephyrproject-rtos/zephyr#52929
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add semihosting support for Xtensa architecture.
Existing semihosting instructions are based on ARM, so they are
converted to Xtensa codes before the semihosting call is invoked.
Return codes of read, write and seek calls had to be converted to match
semihosting API definitions.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Move semihost_x_args structs to include/semihost_types.h so that
semihost implementations can access their elements if needed.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
