Fix the implementation to correctly check the status of
HFCLK and LFCLK states with respect to the requested
sources.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Added Kconfig option and implementation to support a
non-blocking startup of 32KHz crystal oscillator.
This will reduce the time from boot to application start
while the crystal startup happens in background.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.
This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
MSI clock signal can be selected in several ranges.
These ranges should be taken into account for calculating its
frequency and hence global system frequency.
Provide a Kconfig option to set MSI range.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
To enable for easier testing, replace direct use of registers
from Nordic's nrfx MDK with accesses via its HAL inlined functions
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
In stm32 clock_control driver, Kconfig symbol CLOCK_STM32_PLL_PREDIV1
in stm32f3 series was set as conditional on the activation of some
specific STM32F3 SoCs that are not supported yet in Zephyr.
Remove this flag.
In order not to loose a rather studious part of code, comment it out
and set a TODO to specify how to re-enable it once it will be
required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The mcux sim clock control driver was originally designed to pass
through the clock subsystem value from dts to the mcux CLOCK_GetFreq()
function. This assumed that the values in
include/dt-bindings/clock/kinetis_sim.h matched the enumeration in
fsl_clock.h, which is true for the coresys, platform, and bus clocks.
However, the low-power oscillator (LPO) clock has a different values in
k64 vs. kw2xd, therefore we must update the clock_control driver to
parse the value from dts and convert it to the fsl_clock.h enumeration.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enable System Configuration Controller clock in clock_control
instead of gpio controller when we set a gpio as interrupt.
We use System Configuration Controller to manage external
interrupts and enable PIN pair PA11/12, used in USB device,
mapped instead of PA9/10.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Enable System Configuration Controller clock in clock_control
instead of gpio controller when we set a gpio as interrupt.
We use System Configuration Controller to manage external
interrupts and internal voltage reference for 48 MHz HSI
used in USB device.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add MSI as potential SYSCLK direct source for L0 and L4.
It could be needed in some cases when an accurate clock
is required and no external clock is available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Commit 29f8b23b broke "make menuconfig" due to a missing newline in
this Kconfig.quark_se file.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Upcoming Nordic ICs that share many of the peripherals and architecture
with the currently supported nRF5x ones are no longer part of the nRF5
family. In order to accomodate that, rename the SoC family from nrf5 to
nrf, so that it can contain all of the members of the wider Nordic
family.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
nRF52840 USBD requires power events to start USB enumeration.
Add APIs to enable/disable the power events, read the USB VBUS detect
and output power ready statuses which can then be used by the USB driver
in the enumeration sequence.
Signed-off-by: Sundar Subramaniyan <sundar.subramaniyan@gmail.com>
Fix return value to -EBUSY instead of 0 when releasing a
reference but not physically turning off the clock.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Remove SoCs part dependency of CLOCK_STM32_PLL_PREDIV1 config since
it will only be used on parts having an HSE oscillator, ignored
otherwise.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Use "select USE_STM32_LL_UTILS" to select the needed STM32 LL files,
instead of editing ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The combination of
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL and
CONFIG_CLOCK_STM32_PLL_SRC_HSI
on SOCs with PREDIV1 support made use of the LL define
LL_RCC_PLLSOURCE_HSI_DIV_2, which is not defined for SOCs with
PREDIV1 support.
This exchanges LL_RCC_PLLSOURCE_HSI_DIV_2 with LL_RCC_PLLSOURCE_HSI
which is the appropiate source according to stm32f0xx_ll_rcc.h
line 473 and stm32f3xx_ll_rcc.h line 795.
Tested by compiling hello world for nucleo_f091rc board with HSI as
PLLSOURCE.
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.
Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.
This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.
For users that just want to continue their work with minimal
disruption the following should suffice:
Install CMake 3.8.2+
Port any out-of-tree Makefiles to CMake.
Learn the absolute minimum about the new command line interface:
$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..
$ cd build
$ make
PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
Adds a new clock control driver for Kinetis SoCs that have the system
integration (SIM) module. This will allow mcux shim drivers, such as
uart and i2c, to abstract the call to CLOCK_GetFreq() behind the
clock_control interface and thus be reused for SoCs with different clock
architectures.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
If the LF clock was already started, but wasn't initialized with
_k32src_start yet, allow it to run once. This is needed because if a
soft reset is triggered while watchdog is active, the LF clock will
already be running, but won't be configured yet (watchdog forces LF
clock to be running).
If the LF clock isn't configured with _k32src_start, the nRF5 RTC
won't count and the whole system will malfunction, as the kernel
depends on the clock source being working properly.
Signed-off-by: Thiago Silveira <thiago@exati.com.br>
Frequency tolerance for LFRC after calibration for nRF5x
Series ICs is between 251 and 500 ppm as per Product
Specification. For more details refer to:
http://infocenter.nordicsemi.com/
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Following introduction of stm32cube LL based clock control driver,
remove references to former native driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Align stm32f1xx series clock driver to other parts of stm32 family.
Driver support both Connectivity and Density lines of stm32f1 series,
that are based on different Reset and Clock Control architectures.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
During introduction of LL clock_control driver on stm32f4 series,
AHB2 clock activation/deactivation case was let under stm32l4 condition
preventing activation of this clock with F4 series.
This patch fixes the issue.
Change-Id: I5e488e990d33252f491f8960fc7a798ca3416be2
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Commit 58c8d15 ("clock control:stm32: provide STM32Cube LL based
driver") added PLL initialization which disables the PLL before
configuring it.
This works if the system clock source is not the PLL (which is the
usual case for Zephyr booting out of chip reset). However, if the
SYSCLK source *is* the PLL, this halts execution.
To support this use case, switch the SYSCLK source to the
always-present HSI before disabling the PLL.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Factor out a subroutine used to switch SYSCLK to HSI. This code will
be used again in a subsequent patch.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
fix misspelling in Kconfig files that would show up in configuration
documentation and screens.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This commits align CONFIG_ factor names between stm32f4 and stm32l4
series to enable code factorization such as use of Q_DIVISOR.
Though, it does not concatenate kconfig sections as we might use
a bit of time to see what is needed in this regard
Change-Id: Ia603406d53949abf5675b801a5448397d5ab8462
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit enables STM32Cube LL based driver for stm32f4 series.
This generic driver provides a unified API to clock driver for all
stm32 series.
LL API allows driver to be lightweight and to keep genericity across
stm32 family to ease further devlopment and maintenance.
Change-Id: Ie31ae8f433313787f9c9eda77de41925721d54dd
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The PLLN multiplier can range between 50 and 432 on all STM32F4, except
on the STM32F401 where the lower bound is restricted to 192.
Fix the range property and the help text to reflect this reality.
Change-Id: I7b93e84b321f7869aaf611287344cd3e25c893c8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Some fixes where needed to get PLL2 source of PREVI1 functional.
Compiled ok with following configuration:
CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV1_SRC_PLL2CLK=y
CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV2=0
CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL2_MULTIPLIER=8
Jira: ZEP-1758
Change-Id: I5ddfaef1b44c4c4e5e6adedc158a1c9092bc8df5
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit brings code size optimization as suggested by Christer
Weinigel review during review of initial commit for this driver.
It also cleans up useless definition in header file.
Change-Id: Ibeaa2e51570dff21825c60c30ba83d939b31d938
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After introduction and activation of STM32Cube LL based driver on
F3 and L4 series, this commit removes the no more needed code for
native driver for these soc.
Change-Id: I266d1a3fc4b464cee34b1cc1a1a333c5bf923e41
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This new clock control driver aims at providing a lightweight
generic driver to the whole stm32 family.
Driver is based on LL Cube API and hence is for now available
only for STM32 supporting this API: stm32f3xx and stm32l4xx.
Other families should be supported soon.
Once globally supported, this unique driver will also help
reducing the impact of stm32 clock control heterogeneity in
other drivers.
Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to use the CMSIS NVIC APIs rather than the internal ones
so we can remove them in the future.
Change-Id: I7bf3024ea4baf61f1e42bbbd5e4b0abfc6c04e6b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
