Either get priority from devicetree (liteeth) or remove Kconfig symbols
that aren't used anywhere for IRQ priority (gecko, stm32_hal).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Looking at the data sheet for the npcx section 4.15.5 CR_UART Core
Registers, the UICTRL register that is used in the npcx poll
functions is invalid when running in FIFO mode. Instead, calls to
uart_npcx_poll_in and uart_npcx_poll_out should be redirected to
their respective FIFO read/fill functions (when using interrupts).
Changes:
- When calling uart_poll_in: forward the request to uart_fifo_read.
- When calling uart_poll_out: loop until uart_fifo_fill returns
non-0 (we wrote 1 byte).
Signed-off-by: Yuval Peress <peress@chromium.org>
Simple reorg of the function declarations. This change moves
the interrupt driven functions declared at the bottom of the
uart_npcx.c file to the top, clustered under the same ifdef.
Signed-off-by: Yuval Peress <peress@chromium.org>
All dma drivers are devicetree based now so we can remove the last
bits of Kconfig associated with the old driver style.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can utilize the devicetree macros to determine which instances to
enable. This will allow us to phase out the per instance Kconfig
symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Nothing sets the op mode to anything but master. For now default the
mode to master-only and we can determine a devicetree property in the
future if we need to support other configurations.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace Kconfig symbols SPI_DW_PORT_n_INTERRUPT_SINGLE_LINE with just
seeing how many IRQs are defined in the devicetree to determine single
or multiline interrupt support.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SoC that utilized the clock support isn't supported in Zephyr
anymore and there are no users of this code. Remove it for now as it
should get converted to utilize devicetree if needed in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If next_timeout() returns INT_MAX and pass it to
z_clock_set_timeout(), and machine goes to freeze or slow down.
Bad scenario as follows:
- If an argument int32_t ticks is set large value 0xffffffff,
ticks = MAX(MIN(ticks - 1, (int32_t)MAX_TICKS), 0);
replaces it into MAX_TICKS.
- uint32_t cyc will be set near by 0xffffffff
(this is 0xfffd7280 in 100 ticks per second).
- Add adjustment to cyc, adjustment max value is MAX_CYC.
(cyc = 0xffff14fd)
- Over 0x80000000 value of uint32_t is considered as negative
value of int32_t.
if ((int32_t)(cyc + last_count - now) < MIN_DELAY)
This condition is always true.
- Because cyc += CYC_PER_TICK will get overflow, driver sets mtimecmp
near value of current mtime.
(cyc = 0x00007fc0)
- Next timer interrupt will happen soon after return from interrupt
handler.
- By repeating these events, machine cannot go to next instruction,
and it's going to freeze or slow down.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Conver the NIOS-II mSGDMA driver to be devicetree based. Add node for
dma controller into nios2f.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When running the tests of the async api of uart
on nucleo-l4r5zi we get MPU fault.
The reason is ordering initialization. The uart and dma
drivers are initialized PRE_KERNEL_1 while dmamux is
initialized POST_KERNEL.
Thus, the function device_get_binding fails since the
dmamux device is not ready to be used.
Fixes: #32715.
Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
Convert driver and users of pinmux on mcux lpc platforms to getting
basic port info from devicetree (register address, label)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Deprecate the scl-pin and sda-pin properties in the devicetree.
Provide new scl-gpios and sda-gpios properties instead.
This lets the user specify SCL and SDA like this:
&i2c0 {
scl-gpios = <&gpio0 1 0>;
sda-gpios = <&gpio1 4 0>;
};
Instead of having to use:
&i2c0 {
scl-pin = <1>;
sda-pin = <36>;
};
Provide error checking and understandable error messages for invalid
configurations.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The current code is assuming that the SMC/HVC helpers can only be used
by the PSCI driver. This is wrong because a mechanism to call into the
secure monitor should be made available regardless of using PSCI or not.
For example several SoCs relies on SMC calls to read/write e-fuses,
retrieve the chip ID, control power domains, etc...
This patch introduces a new CONFIG_HAS_ARM_SMCCC symbol to enable the
SMC/HVC helpers support and export that to drivers that require it.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Convert ism330dhcx INT_PIN attribute from Kconfigs to Device
Tree binding properties. Here int-pin has been defined as
enum with two possible values: 1 and 2.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Convert ism330dhcx accel and gyro odr attributes from Kconfigs to Device
Tree binding properties.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Converts ism330dhcx accel and gyro range attributes from Kconfigs to
Device Tree binding properties.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
SX1272 chip is very similar to the already supported SX1276;
unfortunately, Semtech provides a completely separate driver
for this one. This commit marks an attempt to avoid code
duplication by means of some not-very-pretty ifdefery.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
The default shell configuration has heavy flash and memory requirements,
requiring project maintainers to set many configuration options to "n"
to keep flash and memory requirements within reason.
This adds a new configuration option, CONFIG_SHELL_MINIMAL, which will
disable flash and memory heavy options by default, and allow project
maintainers to select/imply only the options they want.
On a quick test from an ARM board I'm working on, enabling this option
cut flash space requirements by ~8 KB, and memory requirements by ~1 KB.
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
There is no longer a mem_block pointer in the stream struct so the
assert NULL check isn't relevant anymore.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move dmamux_stm32_channels struct from device data to device
configuration and initialize the dmamux channel - dma channel
assignment during build time,
as this association is hardwired in all known series.
The information is taken from dma_offset and dma_requests device tree
properties. The current implementation is valid for series with either
a single or two dma peripherals and a single dmamux peripheral.
Both dmas can independently enabled.
As the driver uses multi-instance DT_INST_DEFINE, also macros for a
second dmamux are are added that should allow easier extension to a
second dmamux instance.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Use timeout mechanism instead of unbounded loop during enabling ITIM32
module which source clock is LFCLK (32KHz).
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
mpu9250 is a single package that contains both an mpu6050 6-axis
motion sensor and an ak8963 magnetometer. The two parts have
separate i2c addresses, yet despite the common mpu6050 component,
it has a different value in the "WHOAMI" register -- 0x71 instead
of 0x68.
This adds the additional chip id value in order to enable the use
of mpu9250.
Signed-off-by: Adam Serbinski <adam@serbinski.com>
Qemu when running more than one processor has a known synchronization
bug where counter values read from the HPET (notionally a single
global device) can be seen going "backwards" when read from different
CPUs.
There was a pre-existing workaround in the ISR that knew about this,
but the problem can crop up anywhere the counter value is used. In
particular I caught it aliasing with the "max_ticks" computation in
z_clock_set_timeout(), where it would cause a rollover and the
resulting negative comparator value would result in no end of
hilarity.
Wrap all access to the counter register with a counter() inline that
(when the workaround is enabled) forces the result to be monotonic by
clamping it to a minimum of one more than the previously read value.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This also makes it into arch_printk_char_out() which gets linked
in place of the weak symbol version, meaning printk() is usable
as soon as the stack is set up.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The driver was reworked recently so that driver capabilites are
obtained at runtime. The function to obtain the capabilities was
called after L2 initialization though, which is invalid as L2
initialization code already depends on certain driver capabilites.
Move the capability initializer to an earliest possible stage
(i. e. just after the core driver is initialized) to fix the issue.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The comments at the beginning of the file are not quite correct
and instructions regarding configuration are not necessary at all.
Also remove the redundant first line.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Move the SPI and I2C bus I/O bits into their own files. This makes
this driver more similar to other sensor drivers.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Now that we have various convenience macros in drivers/spi.h and
device.h defined, we can resolve some longstanding TODO items in how
this driver gets a hold of the devices it depends on:
- get bus devices with DEVICE_DT_GET
- get SPI chip select information with SPI_CONFIG_DT_INST
The results are shorter on boilerplate, save RAM, and improve boot
time.
The same techniques could be reused by other device drivers.
These changes require that the SPI bus and GPIO (for device CS)
devices used to interface with the BME280 are defined in devicetree.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The PDP context might be active.
If that's the case, the AT+QIACT command returns an error.
It's then not possible to succeed at setting up the module.
Furthermore, we apply the logic described in the Quectel Documentation :
- If there is an issue 3 consecutive times on activating/deactivating
the context, we restart the module.
- If the AT+QIDEAT command returns an error, we restart the module.
This PR is bug-fix aimed.
We leave parameterization of context ID for future enhancement.
Signed-off-by: Thomas LE ROUX <thomas.leroux@smile.fr>
In NPCX7 series, it contains two tachometer (TACH) modules that contains
two Independent timers (counter 1 and 2). They are used to capture a
counter value when an event is detected via the external pads (TA or
TB).
The CL also includes:
— Add npcx tachometer device tree declarations.
— Zephyr sensor api implementation for tachometer.
— Enable "tach1" device in npcx7m6fb.dts for testing.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The stm32 uart driver fails to build on certian platforms due to
changes introduced by:
commit 3c18bcbf77
Author: Francois Ramu <francois.ramu@st.com>
Date: Wed Jan 27 10:27:33 2021 +0100
drivers: serial: stm32 restore uart after lowpower
Fix this by adding some ifdef's around the code that is specific to the
given platforms that the code works on.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Current implementation of uart_npcx_irq_{tx,rx}_ready always returns
false if the respective interrupt enable bit is not set, which means
that the api cannot be used if the interrupts are temporarily disabled
for whatever reasons, breaking patterns such as [1].
Other uart drivers also seems to not have this check, this patch removes
it from the NPCX driver too.
[1] https://github.com/zephyrproject-rtos/zephyr/blob/master/drivers/console/uart_console.c#L549
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Since the uart device clock will be stopped after ec entered sleep or
deep sleep state and restore its clock automatically, there is no need
to implement code for suspending and resuming devices manually.
The driver still needs to check the current status of uart device when
it wants to change its power state to LOW or SUSPEND power state. It is
crucial to forbid ec enters sleep or deep sleep state when uart device
is busy with transmitting data. Or we will observe broken characters on
the uart console.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces power management driver that improves the efficiency
of ec operation by adjusting the chip’s power consumption to the level
of activity required by the application in npcx series.
The following list summarizes the main properties of the various chip
power states. Please refer the power.c file for more detail.
Main power states in npcx series include:
- Active: Core, RAM and modules operate at the clocks generated by PLL.
- Idle: Enter this state when the Core executes WFI or WFE instruction.
- Sleep: clock is stopped for most of modules but PLL is enabled.
- Deep Sleep: As Sleep mode but PLL is disabled.
- Standby: All power rails are turned off besides standby and battery
power rails.
And this CL implements one power state, PM_STATE_SUSPEND_TO_IDLE, with
two sub-states for Zephyr power management system.
Sub-state 0 - "Deep Sleep" mode with “Instant” wake-up if residency
time is greater or equal to 1 ms
Sub-state 1 - "Deep Sleep" mode with "Standard" wake-up if residency
time is greater or equal to 201 ms
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces a kernel device driver implemented by the internal
64/32-bit timers in Nuvoton NPCX series. Via these two kinds of timer,
the driver provides an standard "system clock driver" interface.
It includes:
- A system timer based on an ITIM64 (Internal 64-bit timer) instance,
clocked by APB2 which freq is CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC.
- Its prescaler is set to 1 and provide the kernel cycles reading
without handling overflow mechanism.
- A event timer based on an ITIM32 (Internal 32-bit timer) instance,
clocked by LCLK which frequency is 32KHz and still activated when ec
entered "idle/deep idle" power state for better power consumption.
- Its prescaler is set to 1 and provide timeout event mechansim.
- Compensate system timer which clock is gating for better power
consumption after ec left"idle/deep idle" power state.
This CL passed starve, timer_api, and timer_monotonic test suites.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This will export the stm32_clock_control_init function
to restore the clocks after the low power modes.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Rework the checks for INPSEL, INNSEL, and C0_OFFSET_BIT presence to
avoid warnings when -Wexpansion-to-defined is enabled.
The warning was enabled in c7bc6380bd.
Fixes#32475.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This fixes the logic in erase_sector() for clearing the previous
sector number. The logic was reversed, clearing bits it should not
clear and keeping previous bits of the sector number. In practice this
does not seem to have had any effect on the current functionality, but
it will start to matter later if e.g. flash interrupts are enabled.
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
Modifications to incorporate latest write to new flash area
Modification to avoid writing garbage to new flash area when compactor
is called during init.
Modifications to allow erase at partition size instead of eeprom
pagesize.
Modifications to better separate rambuf usage from flash usage.
Corrected some errors in compactor
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
This driver emulates a EEPROM device in flash.
Reworked implementation with modified flash layout.
The emulation represents the EEPROM in flash as a region that is a
direct map of the eeprom data followed by a region where changes to
the eeprom data is stored. Changes are written as address-data
combinations. The size of such a combination is determined by the
flash write block size and the size of the eeprom (required address
space), with a minimum of 4 byte.
The eeprom page needs to be a multiple of the flash page. Multiple
eeprom pages is also so supported and increases the number of writes
that can be performed.
The eeprom size, pagesize and the flash partition used for the eeprom
are defined in the dts. The flash partition should allow at least two
eeprom pages. For fast read access a rambuffer can be enabled for the
eeprom (by setting the option rambuf in the dts).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
CAN_SYNC_SEG and ts1 are in common units. Both need to be scaled by 1000
to calculate the sample point.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
In the npcx i2c FIFO mechanism, the hardware will release SCL bus
immediately after the driver reads data from FIFO. That's why we need
to hold SCL bus before configuring the next transaction. Once it was
done, the driver release the bus for the next transaction.
But during the last transaction, the driver releases SCL first then
starts a STOP condition. At this moment, the SCL is pulled high by PU
resistance and driven to low for generating STOP condition later. This
additional clock might influence some i2c devices if they don't reset
their state machine after receiving STOP.
This CL fixes this issue by two steps:
1. Distinguish that it's the last read transaction with STOP condition?
2. If so, issue STOP condition before reading FIFO instead of holding
SCL bus. Then the hardware will generate it immediately after reading
FIFO.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The definition to check if timers have up to 6 channels was causing
warnings when -Wexpansion-to-defined was enabled.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The first uart instance was already devicetree based. To be consistent
convert the second instance to also be devicetree based.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
QDEC_NRFX shall depend on either HAS_HW_NRF_QDEC,
or HAS_HW_NRF_QDEC0, since in the nRF5340 Application
core definition we select HAS_HW_NRF_QDEC0 instead of
HAS_HW_NRF_QDEC.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
While running certain peci command, observed when FW attempts
to read last byte (Response FCS), PECI host controller returned
“Read FIFO” empty. Since “Read FIFO” is empty FW didn’t read
the response FCS.
Due to this issue, FW getting corrupted response from the PECI
controller for all the subsequent PECI commands.
To address this issue, FW waits for “Read FIFO” filled up by
the PECI controller.
Signed-off-by: Diwakar C <diwakar.c@intel.com>
Convert from device_get_binding to DEVICE_DT_GET. In doing this we
no longer need the label in the devicetree node so we remove that.
Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This fixes a missing bit in the registers description
which results to wrong FIFO ODR configuration
when trying to configure a FIFO ODR higher than 833Hz
Signed-off-by: Clotilde Sattler <clotilde.sattler@stimio.fr>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is a follow-up to commit 9f56cc5531.
Add net/ in the inclusion of ieee802154_radio.h so that the file can
be successfully included.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The CMSDK uart interrupts for TX and RX can either be treated as a
signel interrupt line or distinct interrupts for TX & RX. In the case
that they were distinct we didn't get the ifdef correct based on DTS.
If we have 2 interrupts in DTS we assume they are for TX & RX and thus
build the interrupt support for distinct TX & RX ISRs.
Also, cleanup handling of UART_2..UART_4 to be similar to how
UART_0/UART_1 code is using DT_INST_IRQN(x).
Fixes#30770Fixes#25601
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A recent patch removed use of the cfg structure, but left a pointer to
it defined which causes build failures.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The NPCX clock driver was already using devicetree, just need to make a
small tweak to use DEVICE_DT_INST_DEFINE and update NPCX_CLK_CTRL_NAME
to match the label for the "nuvoton,npcx-pcc" clock controller.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a simple pinctrl node for the IOF registers under the GPIO
controller node to be used by the pinmux driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert esp driver:
NET_DEVICE_OFFLOAD_INIT -> NET_DEVICE_DT_INST_OFFLOAD_DEFINE
DT label is already required, so use it and drop CONFIG_WIFI_ESP_NAME
option.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Convert ublox-sara-r4 driver:
NET_DEVICE_OFFLOAD_INIT -> NET_DEVICE_DT_INST_OFFLOAD_DEFINE
DT label is already required, so use it and drop
CONFIG_MODEM_UBLOX_SARA_R4_NAME option.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This include make possible to use the arm_arch_timer on
platform such as Cortex-A9 or Cortex-R7 which has support for
ARM Global Timer.
The global timer is a 64 bit incrementing counter, memory-mapped
in the private memory region.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
In some cases we cannot know the BDF up-front, so provide a way to
look it up based on the vendor and device ID.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
These have been redefined in various places - better to have them in a
single place that different users can use.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add ESPI SAF features to the Microchip eSPI driver as
a separate file. ESPI SAF depends upon the core eSPI
driver adding the ability to attach the system SPI
flash to the EC eSPI endpoint instead of the host
eSPI controller.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
During the driver init, the function will set the sensor resolution
based on the driver's dts variable "resolution"
The driver's device tree has been updated to include the value
"resolution".
The default is set to the highest resolution of 0.0625C.
Moved mcp9808_reg_write from mcp9808_trigger.c to mcp9808.c
This allows resue of the same function in both the trigger and
resolution functions.
Function name changed to xxx_16bit to distinquish it from the 8
bit write function that will added.
Signed-off-by: Steven Daglish <s.c.daglish@gmail.com>
In this CL, npcx_miwu_interrupt_configure is no longer responsible for
turning the interrupt off. Although the default state of WK_EN is
disabled, the users still have the chance to configure them when WK_EN
is enabled via npcx_miwu_irq_enable(). Hence, this CL also ensures that
WK_EN is disabled before configuring them.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL uses a simpler configuration approach that turns GPIO's
interrupts off instead of calling npcx_miwu_interrupt_configure
with NPCX_MIWU_MODE_DISABLED.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit introduces runtime query of the HW Capabilities of
the nRF IEEE 802.15.4 Radio Driver.
Signed-off-by: Czeslaw Makarski <Czeslaw.Makarski@nordicsemi.no>
Add posibility to configure UART_X device
based on board dts config.
Enable uart clock only if node is enabled
Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
nRF5340 PDK board was deprecated in v2.5.0 release
and is removed now from the tree.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
By the time hostname configuration was implemented, driver was switching
only between STA and STA+AP modes. After dynamic selection between NONE,
STA, AP and STA+AP was implemented (commit referenced below), hostname
configuration no longer takes effect when ESP chip obtains address over
DHCP (and sends hostname in the DHCP request).
Set hostname each time after enabling STA mode, so that it takes effect
in DHCP requests.
Fixes: 03ce61004b ("drivers: wifi: esp: control CWMODE depending on
current needs")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add some simple depends so we limit various I2C drivers to the SoC
families that the drivers are relevant to.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On I2C V1 parts, LL_I2C_EnableIT_TX() translates to EVT and BUF
IRQ enabling.
In stm32_i2c_msg_write function, LL_I2C_EnableIT_TX is called right
after stm32_i2c_enable_transfer_interrupts which already enables BUF
IRQ, which starts the transfer.
As a consequence it could happen that transfer is already complete
at the time LL_I2C_EnableIT_TX is called. This case is not expected
by remaining part of the code which loops forever waiting for BUF IRQ
to be raised.
Remove the superfluous LL_I2C_EnableIT_TX call.
Fixes: #32265
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
nRF52840, nRF52810, nRF52811 and nRF52805 are affected by anomaly 242.
This patch introduces workaround for this anomaly as follow:
Power-fail comparator is disabled before any attempt to erase or write.
Either erase or write is not proceed if EVENT_POFWARN is
already asserted.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Introduce support for situation when synchronization back-end
aborts operation before it is done. synchronization API will
transfer operation return code to the driver shim back.
Additionally:
FLASH_OP_ONGOING value was switched to be positive in order to
not been mislead with a negative error code.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Keep OOB Rx channel and interrupt always enabled.
Send callback when packet is received in OOB Rx channel
if asynchronous host-initiated handling is enabled.
Note that driver doesn't perform any buffering from packets,
so access to OOB Rx channel is gated by client's driver
packet retrieval.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Currently assumption is all OOB traffic over eSPI bus is always client
initiated.
Add option for systems where host can initiate OOB traffic.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
The calculated alarm time starts from 2000 but the gmtime_r needs as
input the time from epoch (1970). This causes the alarm time to be
miscalculated due to leap years, as 2000 is a leap year and 1970 is not.
To fix the issue, the 2000 timestamp can be added to the input time of
gmtime_r.
Fixes#32260
Signed-off-by: Antonis Sioutas <antonis.si510@gmail.com>
Fixes: "WARNING:CONSTANT_COMPARISON: Comparisons should place the
constant on the right side of the test"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32 uart driver doesn't support 9bits transactions in any case,
so remove case were it was declared as supported.
Fixes#31799
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit fixes sporadic kernel panics when writing big data chunks
to the flash. (data bus errors)
Reference manual:
If an erase operation in Flash memory also concerns data in the data
or instruction cache, you have to make sure that these data are
rewritten before they are accessed during code execution.
If this cannot be done safely, it is recommended to flush the caches
by setting the DCRST and ICRST bits in the Flash access control
register (FLASH_ACR).
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
If statement was unconditionally reading a field from async struct
while pointer to this struct may be null if asynchronous API is
enabled but given driver instance is not using it.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Driver uses DEVICE_AND_API_INIT which is deprecated so convert
to using DEVICE_DT_INST_DEFINE instead.
Fixes#32151
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There are several different issues when trying to build the icm42605
sensor driver:
* Missing entry in drivers/sensor/CMakeLists.txt
* Issues with #ifndef in header files
* Issues with const usage
* Missing function prototypes in headers
* Fix use of LOG_MODULE_REGISTER v LOG_MODULE_DECLARE
* Add missing dts node to tests/drivers/build_all/spi.dtsi
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update NPCX PWM driver so PWM can be turned off as the first call when
PWM_POLARITY_INVERTED is used.
Signed-off-by: Keith Short <keithshort@google.com>
Disable the DIO1 interrupt when the sx126x modem is in sleep mode.
On nRF hardware, this lets the `GPIOTE` hardware be switched off, saving
15uA.
Fixes#31569.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Update the global state of the modem on calls to `SX126xReset` and
`SX126xWakeup`. This stops `SX126xCheckDeviceReady` sending spurious SPI
commands on every transieve before `SX126xSetOperatingMode` is called.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Drivers are using DEVICE_AND_API_INIT which is deprecated so convert
the iproc_pax dma drivers over to using DEVICE_DT_INST_DEFINE and
DEVICE_DT_INST_GET.
Fixes#32153
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The callback pointers for uninitiated operations are implicitly null;
making them explicit only confuses maintainers searching for drivers
that implement the API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Iterate through all lmp90xxx device instances found in the devicetree
and initialise all of them.
Fixes#32046.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix coverity CID 216784.
SJW was not initialized in the tmp_res, but got copied
to the result pointer, which overwrites the value.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
This CL prevents the transaction result overwritten by the recovery
function. Even if the recovery mechanism succeeds, the upper layer still
needs to know why the transaction failed.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Since all fields' type in SMBST is R/W1C and RO, setting a single bit to
clear a specified event is a more suitable solution. Or we might clear
the other pending bits that occurred at the same moment unexpectedly.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL reset i2c event-completed semaphore before starting
transactions. Some interrupt events such as BUS_ERROR might change its
counter when i2c bus is idle. It causes that the driver cannot wait
for the event completed and return immediately.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
So far received packets were parsed (at AT command level) and allocated
in [esp_rx] thread. Then they were submitted to [esp_workq] thread for
processing (calling application callback).
This flow results in following deadlock when esp_workq thread waits on
response to some AT command:
- [esp_rx] waits on allocation of new RX packet
- [esp_workq] waits for [esp_rx] to process response to AT command
that was just sent
- blocked [esp_workq] prevents processing and deallocating RX packets
- [esp_rx] times out on allocation and closes socket
Process RX packets directly from [esp_rx] thread to prevent above
deadlock.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This is a fix for ACRN targets. Qemu ivshmem original specs do not
states that, if ivshmem-plain is selected, bar0 (the register bar) will
not be present. It just says that bar2 will only be sufficient.
And that is what happens on qemu: whether ivshmem-plain or
ivshmem-doorbell is selected, bar0 is always present no matter what.
This does not seem to be the case in ACRN which does not expose the
bar0 if ivshmem-plain is selected.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Gracefully shutdown the UARTE peripheral when the async API is used.
Failure to do so results in the driver being unusable when powered back
up as the required events (ENDTX & TXSTOPPED) are not set. This also
ensures that the last byte sent out via `poll_out` is properly output
on the serial line before powering down.
Fixes#31930.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Update the drivers power state knowledge immediately after calling
`nrf_uarte_enable`. This ensures that the state is correct regardless of
which path the function exits by.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Fixes the bug when driver changes offset after
the callback call. When you have the ready event
you suppose no changes in driver data after that.
Fixes#31973
Signed-off-by: Alexander Shuklin <jasuramme@gmail.com>
The count register is 64 bits, but we're a 32 bit CPU that can only
read four bytes at a time, so a bit of care is needed to prevent
racing against a wraparound of the low word. Wrap the low read
between two reads of the high word and make sure it didn't change.
Fixes#31599
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
When checking for IRQ flags, we should also check
for IRQ status (IsEnabled ?).
If this is not done we can end up in Half Transfer
interrupt processing while it is not enabled.
Additionaly always use the id translation function
in LL API calls.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch fixes warnings for unused variables when acceleremoter
range and sampling frequency are set to values different from
the defaults.
Signed-off-by: Jan Tore Guggedal <jantore.guggedal@nordicsemi.no>
Power consumption was still high after putting uarte device into off
state. It was caused by ENDRX interrupt that was triggered after
calling STOPRX. ENDRX event was called with 0 amount but interrupt
got triggered and fifo_read was starting RX again.
Added disabling RX interrupt before disabling UARTE and reenabling at
device activation.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Some format strings were causing warnings.
As elsewhere in this file, offset is type-casted (or not,
depending on compiler) to long int, and then %ld is used in
format string.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
Start using DTS values for PCI Vendor ID and PCI BDF. For the PCI
Device ID we do not use DTS since this would require changing overlay
for different SKU board.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The function uart_irq_rx_ready() should return true if there is data in
the receive buffer, regardless of whether the irq is enabled. Fix the
mcux and rv32m1 shim drivers to implement this behavior correctly.
Prior to this change:
- irq_rx_full() checks if RX data is available
- irq_rx_ready() checks if RX data is available and interrupts are
enabled
After this change:
- irq_rx_full() checks if RX data is available
- irq_rx_ready() renamed to irq_rx_pending() to avoid confusion with the
API ready() function
- API ready() implementation switched to use irq_rx_full()
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
socket_can_generic.h makes some assumptions that are not always valid
for various drivers with regards to numbering. To clean this up we
add defines for SOCKET_CAN_NAME_0 and SOCKET_CAN_NAME_2 in addition to
SOCKET_CAN_NAME_1.
We also move struct socket_can_context into the drivers themselves
since they know best how many CAN interfaces are getting supported and
what naming/number convention they'd have.
Additionally, this also exposes a few other build issues with the
can_mcux_flexcan driver that get fixed.
Finally, we remove the platform_allow from samples/net/sockets/can
since it is no longer needed.
Fixes#31733
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
ESP fetches DNS servers from local network by using DHCP. There is an AT
command to get those DNS addresses. Use that to provide DNS addresses
for Zephyr's DNS resolver.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Rather than Kconfig vendor symbols, select stm32 watchdog using
compatible.
So user only has to enable the requested node and set
CONFIG_WATCHDOG=y.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix the timeout computation to provide more accurate timeouts
versus requested timeout.
Additionally, the error margin is reworked in order to:
- be relative to the application requested timeout (10% tolerance)
- exclude timeouts inferior to application request
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This CL added more additional details for KBC (Keyboard and Mouse
Controller) bus in espi_event structure. It helps the application to
handle different 8042 events in the callback function.
The format of event data for KBC 8042 protocol is:
[23:16] - 8042 event type: 1: Input buf full, 2: Output buf empty.
[15:8] - 8042 data: 8-bit 8042 data.
[0:7] - 8042 protocol type: 0: data type, 1: command type.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Socket can be closed either by Zephyr or by peer. In the former case ESP
WiFi chip still notfies about closed socket, which currently results in
printing warning log:
<wrn> wifi_esp: Link X already closed
Change level of this log from warning to debug, so that driver users are
not concerned about situation that is a normal behaviour.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Force sx12xx modems into sleep mode on boot. This is the default state
of the modem when not being used due to the TX/RX complete callbacks.
This reduces current consumption by 600uA before the modems are used
for the first time.
As sleep is the normal state after TX/RX when using the LoRa API, it is
garaunteed that this will not change the behaviour of application code.
LoRaWAN starts by calling Radio.Init(), which resets the modem, so any
sleep configuration we do here is discarded.
Fixes#31567.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
`SENSOR_CHAN_GAUGE_AVG_CURRENT` is currently treated as a capacity
by the MAX17055 driver, however the unit conversion is different
for current and must be calculated separately.
Add a separate method to convert a current reading to milliamps
from 1.5625 uV/R_SENSE units, instead of the 5uVH/R_SENSE conversion
that was previously used.
Tested by comparing value read and converted from MAX17055 with
value from an external power profiling kit.
Signed-off-by: Hayden Ball <hayden@playerdata.co.uk>
For multiple channels detection, channels variable was compared with
the output of find_lsb_set which actually is a decimal number.
Since channel is a bitfield the comparison was not behaving as
expected (detecting several channels while only one channel was used).
Rework the code to use the already existing bitfield "index" for
the test.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
There was a regression when implementing automatic AT+CWMODE{,_CUR}
handling based on driver needs. ESP AT 1.7 firmware does not support
AT+CWMODE_CUR=0, which means that radio needs to be either in STA, AP or
STA+AP mode (no NONE state available).
Fix ESP AT 1.7 compatibility by keeping radio in STA mode whenever it is
not used.
Move also first AT+CWMODE_CUR invocation before AT+CWDHCP_CUR, so that
the latter executes successfully with ESP AT 1.7.
Fixes: 03ce61004b ("drivers: wifi: esp: control CWMODE depending on
current needs")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
The ',' character was used as line terminator instead of ';'
in SPI routines. The three affected drivers were not showing
any issue, but the typo is fixed for clarity.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This allows out-of-tree libraries to implement their own temperature
driver.
We allow selecting TEMP_NRF5 to aviod dependency loops
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
With this change it is possible to share all configurations
related to CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION without
including the clock calibration configurations.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Clock calibration should only be used when RC source is used.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The GPIO driver uses a proprietary GPIOTE channel allocator.
This commit makes it use the allocation mechanism provided by nrfx.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
idle is only considered in other timer implementations if ticks ==
K_TICKS_FOREVER but in arm_arch_timer. Just fix it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Added ap_enable and ap_disable api. The driver will open create an
access point with DHCP Server ip 192.168.1.1 and no security.
Added a small fix for the AF_INET issue.
Added parent and remote to accept routine context.
Added put implementation.
Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
net_context contains both net_sock_type and net_ip_protocol, which are
static during the lifetime of net_context. net_context has basically the
ownership of esp_socket, so we can be sure 'type' and 'ip_proto' are
always accessible through net_context API.
Remove 'type' and 'ip_proto' members from 'esp_socket' structure, as
those are already accessible by net_context API.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
