Move disk driver interface to own header and
separate disk access interface and disk driver interface.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add common SDMMC_LOG_LEVEL and SDMMC_VOLUME_NAME.
Initialize drivers at POST_KERNEL level.
Update CODEOWNERS after sdmmc drivers relocation.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The files disk_access_usdhc.c, disk_access_spi_sdhc.c,
disk_access_stm32_sdmmc.c, disk_access_ram.c and
disk_access_flash.c are actually drivers for block devices and SD/MMC
controllers. This patch moves this drivers to drivers/disk and
reworks the configuration so that the drivers are selected when
the corresponding node is enabled.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Resolution currently only gets set if CONFIG_MCP9808_TRIGGER is also
set. If CONFIG_MCP9808_TRIGGER is not set, resolution gets not to '0'.
This small bug fix moves resolution to before CONFIG_MCP9808_TRIGGER is
checked, so that the resolution is changed as required.
Signed-off-by: Steven Daglish <s.c.daglish@gmail.com>
The BQ274XX driver init function performs a lot i2c transfers
that slow down booting the system. We can do this lazely on the
first sample request to speed up the boot.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
List all supported device IDs found in External Design Specification
Volume 1 which have IBECC supported.
Fixes#33543
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This patch includes initial support for FT800 display driver.
It includes basic features. It can be easily extended with more
FT800 display list and co-processor features.
Signed-off-by: Hubert Miś <hubert.mis@gmail.com>
This feature predated the tickless kernel and has been in legacy mode
for a while. We now have no drivers or systems that do not support
tickless, so remove this option and cleanup the code to only use
tickless.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This is another API that is being used in all timer drivers and is not
internal to the clock subsystem. Remove the leading z_ and make promote
it to a cross-subsystem API.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The clock/timer APIs are not application facing APIs, however, similar
to arch_ and a few other APIs they are available to implement drivers
and add support for new hardware and are documented and available to be
used outside of the clock/kernel subsystems.
Remove the leading z_ and provide them as clock_* APIs for someone
writing a new timer driver to use.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Increase BD buffers from 7 to 9 to handle 1024 block
counts having mega/normal src,dst bd combinations in one request.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Sync packet is always CARD to HOST and if it's combined with HOST
to CARD transfers in one single RM header packet, it's not allowed
due to RM implementation constraints. RM implementation allows same
type of data transfer direction in all the BD's populated under one
header BD.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Remove support for counter_read and counter_get_max_relative_alarm as
they have been deprecated for at least 2 releases. As part of the
removal of counter_get_max_relative_alarm remove the code in all
counter drivers that implemented the API.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
GPIO driver properly disconnects a pin. On subsequent pin
configure calls the driver does not clear the GPIO pin's
power gate field resulting in the pin remaining disconnected.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Function random_byte_get() returns only the least significant byte of
the 32-bit random datum, as this is the used value, so avoiding that
higher numbers are interpreted as negative error codes and their value
is not discarded.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
In NPCX chips, System Configuration module can configure not only
pinctrl but also misc. functionality such as glue and flash write
protection. This change moves the scfg driver from the pinctrl folder
to soc/arm/nuvoton_npcx/common and renames it to avoid confusion.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Register T0CSR bit 4 is WDRST_STS which is used to check whether the
chip has watchdog reset from the last power-up or vcc1_rst. WDRST_STS
hardware is design to write one clear. For the original
read-modify-write, it will reset the WDRST_STS unexpected. Add a mask
to avoid it.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
This CL solves an interrupt storm caused by plenty of host access
messages when system is in S0. It only turns on the host access
interrupt before ec enters sleep and turns it off after leaving
sleep.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Adds support for the Texas Instruments FDC2X1X Capacitance-to-Digital
Converter for Proximity and Level Sensing Applications.
Signed-off-by: Igor Knippenberg <igor.knippenberg@gmail.com>
Added support for STM32H753XX by adding CONFIG_SOC_STM32H753XX to list
of H7 SoC with maximum 480MHz SYSCLK.
Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
When, due to EMC, a spike happens on the SCL line the driver stay in
BUSY state. It could be reproduced by forcing the SCL temporarily to
ground. It's probably a behavior relating to the operation of
multi-master.
By adding a timeout to the msg_read and msg_write function we can
detect that something went wrong, and when that happens we force the
end of communication.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Advanced stm32g0 socs additionally have gpio port e.
This commit adds the missing definition for the port.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Currently level interrupts are implemented using GPIO SENSE, but edge
interrupts using GPIOTE events. Using GPIOTE events results in increased
power consumption according to product specifications and erratas of
some nRF MCUs. In case of nRF52832 it is <20uA in System ON Idle and
~400-450uA when used in conjunction with SPI or TWI.
Add a user configurable option to select between GPIOTE events and GPIO
SENSE mechanism, for implementing edge interrupts. Selecting GPIO SENSE
option will allow to reduce power consumption in scenarios mentioned by
nRF MCUs erratas.
Additionally GPIO SENSE mechanism (as opposed to GPIOTE event) allows to
detect state changes of pins configured as output.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Ported commit 49a3ce5881
Transfer locking is required if multiple devices use the same i2c bus.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The fixed number of 24 RTEs is a legacy thing, and long gone by now.
IOAPICs expose the maximum number of RTEs they have via the version
register, so let's use it.
This avoids to manually tweak a Kconfig option (which is now removed)
and fixes the RTE number for all x86 targets relevantly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Autostarting PPP is far from controversial. There are many, many reasons
someone could have for wanting to control exactly when PPP starts. Power
management, NET_EVENT race condition avoidance and any application not
requiring constant and instant use of networking just to name a few.
This commit introduces a Kconfig setting, GSM_PPP_AUTOSTART, which
controls whether gsm_ppp should connect and initialize PPP at boot. It
is set to "y" as default to minimize surprises for legacy code.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Added (void) cast to supress coverity report. The usage of K_FOREVER
tells me we're not interested in the returned value.
Coverity-CID: 219653
Fixes#33034
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
Add GPIO driver for QuickLogic EOS S3 SoC.
Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com>
Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
If return value is negative (failed) then log the error with a
message.
Coverity-CID: 219519
Fixes#32927
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
This commit simplifies the Device Tree configuration by using
the new helpers introduced in #30536.
In particular:
- get bus devices with DEVICE_DT_GET
- get SPI information with SPI_CONFIG_DT_INST
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Currently, if GPIO_DISCONNECTED flag is used pin remains as input,
this causes some additional power to be drain which is
undesired.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Remove useless operands since 'bit' field of npcx_clk_cfg structure is
only 3-bit depth and always under 8.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL prevents changing data content in the write function of host
interface by declaring it as constant pointer.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
In function wwdg_stm32_init, return value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219600).
Fix this.
Fixes#33067
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In function gpio_stm32_enable_int, retiurn value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219652).
Fix this.
Fixes#33035
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
RX/TX buffer depth are configurable parameters of DW_apb_i2c.
Change code from using fixed value I2C_DW_FIFO_DEPTH to using
register ic_comp_param_1 for RX/TX buffer depth.
Signed-off-by: Satoshi Ikawa <ikawa.satoshi@socionext.com>
Fix#32774
Bit position BIT(7) is 1000 0000 in binary which is actually the
bit positon 128. BIT(7) can be used as a mask, but we need to define
the position specifically as the integer 7.
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
Remove SPI_[0-8] and SPI_[0-8]_OP_MODES Kconfig symbols as no driver
uses them anymore. We also cleanup board and sample code to remove
use of these symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add MCGOUTCLK define to kinetis_mcg.h to make it possible to
use \`<&mcg KINETIS_MCG_OUT_CLK>\` in device tree.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
There was a bunch of dead historical cruft floating around in the
arch/xtensa tree, left over from older code versions. It's time to do
a cleanup pass. This is entirely refactoring and size optimization,
no behavior changes on any in-tree devices should be present.
Among the more notable changes:
+ xtensa_context.h offered an elaborate API to deal with a stack frame
and context layout that we no longer use.
+ xtensa_rtos.h was entirely dead code
+ xtensa_timer.h was a parallel abstraction layer implementing in the
architecture layer what we're already doing in our timer driver.
+ The architecture thread structs (_callee_saved and _thread_arch)
aren't used by current code, and had dead fields that were removed.
Unfortunately for standards compliance and C++ compatibility it's
not possible to leave an empty struct here, so they have a single
byte field.
+ xtensa_api.h was really just some interrupt management inlines used
by irq.h, so fold that code into the outer header.
+ Remove the stale assembly offsets. This architecture doesn't use
that facility.
All told, more than a thousand lines have been removed. Not bad.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Serial Wire JTAG configuration option is made available
under condition that SPI_3 was not enabled on SOC_STM32F103XE.
Besides being obsolete there are various other potential conflicts
with other periphals, and it is not possible to explicit them all.
To make it more coherent remove such condition, assume that user
needs to take care of such pin conflict and express SWJ as having
precedence over peripheral devices pin configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Lowest power consumption can be achieved when uarte peripheral
is disabled when not used. In low power mode, need for both
directions is tracked and if both are no in use peripheral is
disabled. TX disabling is instant but RX requires flushing RX
fifo because data in hardware fifo is lost when peripheral is
re-enabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Refactored driver to prepare for low power extension. Functional
change is limited to handling of RX_DISABLED event which is now
generated from RXTO interrupt context after RX is stopped. Previously,
RX was not stopped after the transfer.
Rx flushing function contains hardware limitation workaround.
Workaround is applied only if flushed data is not discarded.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Some modems, under some conditions, have a tendency to get stuck without
a connection due to cached state. We have observed this on some Simcom
LTE modems after large cellular outages. The modems are unable to escape
their cached state for some reason unless they're factory reset (or a
cache clearence is forced in some other way).
This commit allows for the modem to be factory reset at each boot. This
minimizes dependencies on external state by ensuring each power-up is as
similar as possible.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Current DW I2C driver uses 32 bit access for some registers and
16 bit access for others. So if DW I2C IP is connected via bus
which doesn't support 16 bit access we will get bus error.
Fix that by switching to 32 bit access only instead of 16
and 32 bit mix.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
As this header declares a function that uses a cube defined structure
as argument, it should include the matching header.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add SMP support.
Note: there is still limitation that we rely on NUM CPUs.
And all cpus must be from 0,1,2 and ....
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There was an error in the ordering of the parameters in the
DEVICE_DT_DEFINE for the native POSIX counter. This made a project
using a counter built for native posix not being able to compile.
This commit switches places for ctr_init and device_pm_control_nop.
Signed-off-by: Tofik Sonono <tofik@sonono.me>
Currently there is no way to distinguish between a caller
explicitly asking for a semaphore with a limit that
happens to be `UINT_MAX` and a semaphore that just
has a limit "as large as possible".
Add `K_SEM_MAX_LIMIT`, currently defined to `UINT_MAX`, and akin
to `K_FOREVER` versus just passing some very large wait time.
In addition, the `k_sem_*` APIs were type-confused, where
the internal data structure was `uint32_t`, but the APIs took
and returned `unsigned int`. This changes the underlying data
structure to also use `unsigned int`, as changing the APIs
would be a (potentially) breaking change.
These changes are backwards-compatible, but it is strongly suggested
to take a quick scan for `k_sem_init` and `K_SEM_DEFINE` calls with
`UINT_MAX` (or `UINT32_MAX`) and replace them with `K_SEM_MAX_LIMIT`
where appropriate.
Signed-off-by: James Harris <james.harris@intel.com>
Added CLOCK_CONTROL_NRF_FORCE_ALT dependency to some options which
are not valid when clock is controlled by out-of-tree driver.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Modified CLOCK_CONTROL_NRF_ACCURACY to represent integer value of
LF clock accuracy.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The shim layer could in some circumstances not be properly
configured which would result in an unbound radio interrupt
handler.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Add a name to the h4 rx thread.
It's useful to put a name on each thread for debugging, e.g., with the
shell's kernel threads command.
Signed-off-by: Pete Skeggs <peter.skeggs@nordicsemi.no>
Zero initialize the ch_handle in dma_pl330_configure().
The memset in dma_pl330_config_channel()is incorrect,
as the ch_handle is already populated with valid values and
the dma_pl330_config_channel() is overwriting with zeros.
Signed-off-by: Arjun Jyothi <arjun.jyothi@broadcom.com>
AArch64 has support for PSCI. This is especially useful for SMP because
PSCI is used to power on the secordary cores.
When the PSCI driver was introduced in Zephyr it was designed to rely on
a very PSCI-centric subsystem / interface.
There are two kinds of problems with this choice:
1. PSCI is only defined for the non-secure world and it is designed to
boot CPU cores into non-secure state (that means that PSCI is only
supposed to work if Zephyr is running in non-secure state)
2. There can be other ways or standards used to start / stop a core
different from PSCI
This patch is trying to fix the original wrong assumption by making the
interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI
only as an actual driver that is a user of this new interface /
subsystem.
For now the new subsystem is only exposing two methods: cpu_on and
cpu_off, others will probably follow according to the needs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The name for registers and bit-field in the cpu.h file is incoherent and
messy. Refactor the whole file using the proper suffixes for bits,
shifts and masks.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
There is a hardcoded macro in Winc1500 HAL SPI driver
that would prevent the driver from working.
This macro is now defined only based on KConfig entry.
This KConfig entry is by default not set.
To enable, set "CONFIG_WINC1500_DRV_USE_OLD_SW=y"
in proj.conf or board.conf
Signed-off-by: Raja D. Singh <rdsingh@iotwizards.com>
Replace legacy API with new API. Note that this driver uses the
schedule, not reschedule, API, since triggers for delay never overlap.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Now that pinmux driver holds a table of GPIO device pointers,
use gpio device as the single source of trust for gpio_base
and remove use of port_base and related code.
This way, gpio_stm32_configure could directly take gpio device
pointer as argument.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use new gpio_stm32_clock_request function for GPIO clocks control.
To do this a new table of GPIO devices is set up at build time.
It is then used to populate targeted device when calling
gpio_stm32_clock_request.
Clean up remaining clock handling related code in the file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As a preparation for GPIO ports clocks power management,
add a dedicated central function fog GPIO ports clock toggling.
This function is made accessible to other users (pinmux).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On L4/L5 device, GPIO port G benefits from a dedicated supply
rail that should be enabled independently.
Review the code around this:
-Compile only when port G is enabled
-Assume that PWR clock is ON, as it is enabled as part of clock init
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The DMA module the i2s_sam_ssc relies on cannot change during the
runtime. Store pointer to dev_dma in flash, not in RAM. The new
implementation saves 40 bytes of flash and 32 bytes of RAM.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
