Incorporate the basic RTK API as well as a basic client integration
(serial) as a way to receive and publish the RTK data.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Validating both a frame without CRC (should return calculated CRC), and
with CRC (should return 0 as a match).
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Add overlays required to run the sample on
- nrf54h20dk/nrf54h20/cpuapp,
- nrf54l15dk/nrf54l15/cpuapp,
- nrf54lm20dk/nrf54lm20a/cpuapp.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Extend platform_allow with other nrf54* targets (overlays for these
targets already exist in the boards directory).
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
MSPM0L2228 launchpad provides evaluation and development
platform with 32KB SRAM and 256KB Flash. This board also
comes with 32Mhz external high frequency crystal and 32.768Khz
low frequency crystal.
Also LCD (only with L2228 SoC's) is included with many multi-function
PIO's exposed. Add support with basic UART and LED functions.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
mspm0lx series comes with various SoC's which varies in RAM,
Flash size and also with peripherals. Add support for all
the currently available SoC's with basic template.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
LUT sizes directly reflects the global data when enabled in dts
(even if no or few pins are really consumed). Also the PINCM
numbering across the series (g, l and c) is within 255, so fix
to use uint8_t to save the global space.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
All the HAL API/wrapper depends on PINCM indexing, which cannot
be derived from neither pin number nor the address offset.
With current approach, update the LUT table of possible PINCM's
for L series with GPIO A, B and C banks.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
mspm0 family of SoC series is split into three category,
mspm0g - high performance
mspm0l - low power
mspm0c - entry level
With G already part added, add support for L series of SoC's.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
although udiv is represented in clock tree of L series, this is
not really present or controllable from SYSCTL registers. Enable
udiv only if present in dts.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
mspm0 series (currently g, l and c) shares the common SoC
level init functions and pin control/muxing configurations.
To avoid duplication for each series, create a common path
and move the SoC and pin control definitions.
Other common functionalities like Power Management, Power off
handling will be added in future, which will be common across
series.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
MSPM0Lx series supports pin function upto 11 i.e 0xb, extend
the pin control function number to 11.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Flash size and address is extracted from dts, which will be common
for all the upcoming series of SoC's like MSPM0L, MSPM0C. Move the
flash address and size to soc level defconfig.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Update manifest to point MSPM0L series support.
Currently it only supports L2228's devicetree pin functions.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Add overlays used for testing differential mode support in STM32 ADC
driver:
- Nucleo F303K8
- Nucleo H753ZI
Signed-off-by: Matt Rodgers <mrodgers@witekio.com>
Differential mode support consists of:
- If differential mode is supported by the underlying hardware AND at
least one differential channel is enabled in the devicetree for this
ADC instance, then perform a differential mode calibration in addition
to the usual single ended calibration during initialisation.
- Set channels to the appropriate differential or single ended mode
during channel setup.
Currently the N6 series is not supported even though the underlying
hardware supports differential mode, due to complications in the
calibration procedure.
Signed-off-by: Matt Rodgers <mrodgers@witekio.com>
Co-authored-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
TI MSPM0 timer module has capture block used to capture timings of input
signal. Add a support for TI MSPM0 PWM capture.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Add test case to cover RAM vector table relocation when
CONFIG_SRAM_VECTOR_TABLE is selected
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
Use --test-pattern to filter scenarios using regular expressions, for
example:
./scripts/twister --test-pattern '^kernel.semaphore.*' -v
will run all those test using this identifier pattern, and nothing else.
Multiple patterns are possible.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Certain implementations require more stack to operate.
Increase the stack size to avoid overflows.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
A clone of the zms test, using the retention backend, with support
for nrf52840dk and qemu_cortex_m3
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Now when role is sink and source sends data, stream recv callback is
not registered, apps works fail. so stream recv callback should be
checked.
Signed-off-by: Cheng Chang <cheng.chang@nxp.com>
Configure the initial pin state of the SPIM peripheral to SLEEP, not
DEFAULT. This fixes the pins being configured in DEFAULT until the first
time the interface is used if `zephyr,pm-device-runtime-auto` is
enabled.
Signed-off-by: Jordan Yates <jordan@embeint.com>
A kernel panic was observed on a platform when k_sem_give() was called
in npcx_kbd_ksi_isr(). From the panic information, it appears that
the semaphore was used before it was initialized. This commit prevents
the potential issue by enabling the interrupt only after
the input_kbd_matrix_common_init() function is called
(where the semaphore is initialized).
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Configure the initial pin state of the UARTE peripheral to SLEEP, not
left uninitialised. This fixes the pin configuration not being set until
the interface is used if `zephyr,pm-device-runtime-auto` is enabled.
Signed-off-by: Jordan Yates <jordan@embeint.com>
If a compliance test itself throws an exception, the entire script is
aborted.
Update this by capturing the exception and failing only the test itself.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Initialize 'dl_file' to 'None' before the logic that determines
which binary file to load.
Resolves the E0606 Pylint warning.
Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
