Transition nrf54h away from the soc specific gpd
(global power domain) driver which mixed power domains, pinctrl
and gpio pin retention into a non scalable solution, forcing soc
specific logic to bleed into nrf drivers.
The new solution uses zephyrs PM_DEVICE based power domains to
properly model the hardware layout of device and pin power domains,
and moves pin retention logic out of drivers into pinctrl and
gpio, which are the components which manage pins (pads).
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The use of timer3 seems to be some legacy leftover from when the
overlay was specific to esp32s3_devkitm originally (commit cf3b2643).
Using timer0 instead.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
In current implementation, the UUID 128 is not well supported. The
found issue includes,
Issue 1: No clear byte order of the UUID 128 in local SDP record.
Issue 2: No clear byte order of the UUID 128 of the SDP discover
parameter.
For issue 1,
Add the description to note that if the SDP attribute type is
`BT_SDP_UINT128`, `BT_SDP_INT128`, and `BT_SDP_UUID128`, the byte
order should be little-endian.
And swap the 128bit from little-endian to big-endian when responding
the peer SDP discovery request.
For issue 2,
Add the description to note that if the SDP discovery type is
`Service Search` and `Service Search Attribute`, and UUID is UUID 128,
the passed UUID data of the discovery request parameter should be
represented as the little-endian byte-order sequence.
And swap the 128bit from little-endian to big-endian when packing the
SDP discovery packet.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
test_smp_boot_delay sometimes fails due to thread started by IPI
not having started or not finished running:
* Using CPU mask to explicitly state which CPU to start the thread
seems to fix the issue where the thread is not started quickly
enough.
* When the host system is under heavy load (e.g. twister-ing),
emulators may not get enough CPU time to run the newly created
thread. So extend the IPI delay a bit more to allow for this.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
PCA9533 is added to the overlay so the new driver
is compiled by the automated “build all LED drivers” test
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
1. Update nxp irtc driver to fix issue in init and alarm function.
2. Update RTC device tree binding to support "share-counter".
3. Update RT700 dtsi to support rtc0 for cpu0 and rtc1 for cpu1.
4. Update readme.
5. Update unit test project conf for RT700.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
The helper function should have the flexibility to have different
expected CS counts. Namely, the test cases where the transfer is
essentially empty should not need to assert CS and many platforms are
failing on CS testing currently due to expecting CS assert and deassert
despite it being a 0 clock/bit transfer being specified.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Use an atomic_t instead of semaphore for counting the CS, semaphore is
too heavy and wrong choice for this variable.
Also, print what the actual value gotten was in case of error.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
In 4c93fcd35b, the default use case has been changed to support setting
a custom handler, but it's written in a way to only support MCUX and
SYSTICK based platforms. For any other platform the build break because
of undefined TIMER_IRQ_HANDLER and TIMER_IRQ_NUM.
Fix the conditional so that the custom timer line is only entered if a
custom handler is defined. The test would probably stil not run on those
platforms until a custom case is defined pointing at the custom timer
interrput handler, but at least it won't break CI.
Also drop a closing endif comment as that clearly became misleading.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Update all nodes located in the MAIN domain and add the
main_ prefix. This is required because the am64x_main.dtsi
now has this prefix.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Add tests to make sure that if neighbor cache does not contain
info for neighbor link layer address, we can queue packets
and re-send them when the neighbor cache contains the data.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Make sure that we will never access ICMP handler struct
that is allocated from stack.
Without this change, there was mysterious crashes if using
native_sim board where the handler function was pointing to
stack data which contained garbage when the test was run.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
This commit adds support for the extended feature set
feature. This includes:
- hci boilerplate
- kconfigs, including one for a max local feature page
- reading remote features is done by a command and callback
- this is not linked into the auto feature request on
connection as this procedure can take quite a few connection
events, and we do not want to delay the user
- added the commands to the bt shell
Signed-off-by: Sean Madigan <sean.madigan@nordicsemi.no>
The UUID library utilities require dynamic memory allocation for certain
operations, but MINIMAL_LIBC provides no malloc heap by default. This
causes test failures when UUID functions attempt to allocate memory.
Add CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE=256 to provide a minimal heap
arena sufficient for UUID operations which typically
require small heap allocations.
Signed-off-by: Mohamed Moawad <moawad@synopsys.com>
Add a test for check_init_priorities --initlevels in addition to the
normal error output, this validates that the function names are printed
correctly.
The current case covers sys_init, device with no init functions and
device with init function so it should be all cases.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Running twister with plaform Microchip mec_assy6941/<variant_name>
builds the arm_irq_vector_table test. Microchip mec_assy6941 boards
all use a 32-bit 32 KHz timer for the kernel. The test build fails
due to any board using a custom kernel timer driver requires the
test to include a chip specific interrupt table. We don't want to
exclude the test. The MEC chips include Cortex-M4 SysTick. We added
board overlays to the test turning off the 32KHz timer and enabling
ARM SysTick. The test now builds.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
As a first step to enable the similar variants (e.g: ICM42686),
refactor common functionality into icm4268x files. As a result,
applications using the icm42688 will need to have both compatible
properties: "invensense,icm42688" and "invensense,icm4268x" defined.
In-tree boards have been modified to comply with this pattern.
This patch does not contain functional changes. The driver should
work the same as before.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
SPI(M/S)20 and SPIM(M/S)21 instances enable usage of pins on different
port, but require request for constant latency mode. Added
handling of such scenario in the driver. Added testcase
to cover it.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
UARTE20 and UARTE21 instances enable usage of pins on different
port, but require request for constant latency mode. Added
handling of such scenario in the driver. Added testcase
to cover it.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Some SoCs might not have any VDD reference available.
Use internal 1.2V reference derived from VDD in this case.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
add nucleo_h745zi_q_stm32h745xx_m7 overlay and config
add nucleo_h745zi_q_stm32h745xx_m4 overlay and config
Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
Commit extends existing persistent provisioning bsim mesh test that
checks that mesh removes gotten stuck persisted key if key is reused.
Correct key is imported normally after that.
Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
Add a overlay to the counter_basic_api test to enable the counter node
of TIM2, TIM3, and TIM14 to TIM17.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add a overlay for the nucleo_c092 testing usart4 and dma
channels 6 and 7. These are all not available in smaller STM32C0 SoCs.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The wdt_basic_api test uses retained memory. Currently,
uses sram0 for the ram space. This mostly does not retain
memory. Since the test variables are unable to retain
their value this platform test fails and should be excluded
for now.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
The concurrency and switching tests take quite some time to
finish (relatively speaking). When running in emulator and
under a heavily loaded system (e.g. twister-ing), it may
time out as the emulator is not getting much CPU time. So
make the base timeout longer, which can then be further
adjusted by the board timeout multiplier.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Update DTS settings to add DMA configuration to devices which
support GDMA peripheral, in order to perform operations via DMA
driver instead of HAL functions.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
LwM2M client context was defined on stack in the test function, however
it could still be in use when the test ended, as the actual LwM2M
teardown took place in a common "after" test function. In result, the
Lwm2M context content could be corrupted.
Additionally, increase the system work queue stack size, as the stack
overflowed.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Refactor the default RAM memory map on nrf54h20dk:
Removes use of "nordic,owned-memory" which is no longer needed on
nrf54h20. Reserved memory nodes that were under "nordic,owned-memory"
have been moved directly under reserved-memory.
The memory shared between cpuapp-cpusec and cpurad-cpusec in RAM0x
is no longer used with IronSide, since IPC buffers toward the secure
domain are at new fixed locations. The cpuapp_data region
has been expanded to fill the available space in RAM0x when removing
these shared memory regions.
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
This replaces the legacy SDFW compatible board configuration with the
IronSide SE compatible one, thus removing support for running samples
and tests on nRF54H20 devices with the old firmware.
All applications are expected to work on `nrf54h20dk/nrf54h20/cpuapp`
out of the box. For other board targets, all applications are expected
to boot, but may require additional peripheral configuration in UICR.
Build system support for the new UICR format is to be added separately.
Co-authored-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Update this multi-core test to always run the `main` and `remote` images
on cpuapp and cpurad respectively.
This is to prepare the test for running with IronSide SE, in which case
keeping cpurad as the main board target wouldn't make as much sense,
because cpurad would have to be started by cpuapp.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Board overlay was moved from downstream to upstream.
By mistake, License was left unchanged.
Change License type to match with the upstream.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
