Add Marcin Szkudlinski to codeowners
Add Adrian Bonislawski to codeowners
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds basic support for the watchdog timer on the RP2040 MCU and
Raspberry Pi Pico development board
Signed-off-by: Jamie McCrae <spam@helper3000.net>
Add entries for w1 doc, api, drivers, and tests in the CODEOWNERS as well
as the MAINTAINERS file.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Updates the API and types to match updated I2C terminology. Replaces master
with controller and slave with target.
Updates all drivers to match the changed macros, types, and API signatures.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
A DMA friendly Stream API for zephyr. Based on ideas from io_uring
and iio, a queue based API for I/O operations.
Provides a pair of fixed length ringbuffer backed queues for submitting
I/O requests and recieving I/O completions. The requests may be chained
together to ensure the next operation does not start until the current
one is complete.
Requests target an abstract rtio_iodev which is expected to wrap all
the hardware particulars of how to perform the operation. For example
with a SPI bus device, a description of what a read, and write mean
can be decided by the iodev wrapping a particular device
hanging off of a SPI controller.
The queue pair are submitted to an executor which may be a simple
inplace looping executor done in the callers execution context
(thread/stack) but other executors are expected. A threadpool executor
might for example allow for concurrent request chains to execute in
parallel. A DMA executor, in conjunction with DMA aware iodevs
would allow for hardware offloading of operations going so far as to
schedule with priority using hardware arbitration.
Both the iodev and executor are definable by a particular
SoC, meaning they can work in conjuction to perform IO operations
using a particular DMA controller or methodology if desired.
The application decides entirely how large the queues are, where
the buffers to read/write come from (some executors
may have particular demands!), and which executor to submit
requests to.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This commit rewrite renesas R-Car clock driver in order
to be able to support any new SoC easier.
This work is so creating a clock driver per soc alongside a
common driver for all reneasas r-car boars.
- drivers: create a driver per soc
- create a common driver
- create a common header used by soc & common driver
- create a soc specific driver calling for common driver
- dts: use new compatible
- use old yaml as common yaml
- create a new "child" yaml to define the new compatible field
- change compatible in device tree
As in Linux, the driver can support both r8a77951 and r8a77950
SoC's so we decided to name the new driver as in Linux with Zephyr
prefix : "clock_control_r8a7795_cpg_mssr.c".
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This is to update the CODEOWNERS file and to add owner
for these two directories
1) /soc/arm64/intel_socfpga
2) /dts/arm64/intel/*intel_socfpga*
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
This code has gone unmaintained and bugs continue to be reported
against it. We do not have the resources as a project to maintain this
in "odd fixes" mode, and nobody has stepped up to maintain it [1], so
sadly this must be removed for now.
If anyone would like to see civetweb supported in upstream Zephyr
again, they are welcome to add it back, as long as they promise to
maintain it going forward.
Many thanks to everyone who has contributed to civetweb support in
Zephyr while it was here. So long and thanks for all the fish.
Fixes: #45807Fixes: #43910Fixes: #34226Fixes: #46743
[1] https://lists.zephyrproject.org/g/devel/message/8466
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This includes a basic driver for built-in flash on the Texas Intruments
SimpleLink CC13xx/CC26xx SoC series.
The driver makes use of driverlib HAL from TI's SDK and was tested on
two LaunchXL development boards with CC1352R and CC2652R SoCs:
- CC1352R1 LaunchXL
- CC26x2R1 LaunchXL
Tests were done using:
- flash shell sample (samples/drivers/flash_shell)
- littlefs filesystem sample (samples/subsys/fs/littlefs)*
- MCUboot (bootloader/mcuboot/boot/zephyr)*
* additional changes in DTS for the boards were required (partitions
table) and are not part of this changeset (will be introduced later)
Some additional information about the implementation:
1. TI's Technical Reference Manual for CC13x2 and CC26x2 points out that
"An individual 64-bit word can be programmed to change bits 1 to 0"
but it seems this 'alignment' requirement is handled internally by
the ROM function and thus 'write-block-size' is set to 1.
2. Interrupts, VIMS and line buffers are disabled during flash content
update (write or erase) and restored afterwards as recommended by TI.
3. Only RAM to flash write is supported (source of data to be written to
flash can't point to flash).
4. The driver doesn't take care of flash sector protection disable as
that functionality is handled by CCFG. Write or erase requests which
refer to a protected area will fail.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Pinmux is depricated (see #39740) and shouldn't be used anymore
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
All SD cards require SD CMD0 (reset) and CMD8 (send IF cond) at boot.
Add this portion of the initialization flow to SD subsystem, as well as
query command to check if card is SDIO.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Implement SDHC driver for NXP USDHC peripheral, supporting all api calls
available in the sdhc driver. This implementation leverages NXP's HAL,
and simply implements a shim layer over the HAL itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Practically all changes in the last 2 years in this folder
are in actual tests, and not in infrastructure.
There is no need for me to be added as reviewer to them,
specially as all involved know how to ping me if needed.
=> Remove myself from the CODEOWNERS list for
tests/bluetooth/bsim_bt/
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Move include paths and add new target_include_directories to support
backwards compatibility:
* /include -> /include/zephyr
example: <irq.h> -> <zephyr/irq.h>
Issue #41543
Signed-off-by: Yuval Peress <peress@google.com>
Move the kernel documentation up and make it a main chapter. Right now
it is hidden very low in the structure under references.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add myself to the CODEOWNERS for samples/subsys/logging/syst
to make checkpatch happy, and to get notifications of changes
in the sample.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Until now the whole USB device stack code is located
in the top subsys/usb directory. Move it to own directory
in preparation for upcoming extension and rework of USB support.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add a dummy driver for the `vnd,pwm` compatible to allow compilation of
drivers utilising PWM when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adds an entropy driver that uses Bluetooth HCI commands as its source
of randomness. As this method is blocking, the ISR API is not supported.
As this method will range from relatively slow (same core Bluetooth HCI
controller) to extremely slow (UART HCI Bluetooth controller), use the
xoshiro PRNG by default for RNG generation.
Implements #37186
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This
processor operates at 200MHz and executes on SRAM.
This patch adds support for ast1030 as the first SoC of this series
which is targeted but not limited at the bridge IC in a server system.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
As mentioned in #42882, the I2C of IT8XXX2 is designed for two different
IP blocks, so this PR divides this I2C driver into two compatibles.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This contains accessor macros for getting the maximum bitrate supported
by a CAN controller/transceiver combination.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds a USB Type-C Port Controller Driver for
the STM32 USB Type-C / USB Power Delivery (UCPD) peripheral
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The commit adds guide that describes format of SMP reqests/responses
as issued by Zephyr implementation within mcumgr.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
New driver needs owners (hijack the earlier cAVS wildcard for the
intra-DSP, it's now a legacy thing and essentially unrelated, but is
for the same platform).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Intel's adsp needs to set, at a minimum, a clocking bit before the driver
can initialize the designware dma controller. In many ways it is the
designware dmac IP but with additional registers and functionality added
on top of it. So the code structure here follows how the hardware
appears to be designed, layered on top of the designware driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
As part of #40167 is was discovered that devicetree headers are always
generated when CMake re-runs.
This causes all source files that directly or indirectly through
included headers to recompile when CMake re-runs, even if there are no
changes to devicetree.
This commits introduces `zephyr_file_copy(...)` similar to
`file(COPY_FILE ...)` from CMake 3.21.
However, as CMake 3.20 is supported by Zephyr we need a zephyr variant
of this function to allow usage with CMake 3.20.
This ensures that only when there are changes to devicetree headers,
then source files will recompile.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Add Bluetooth controller tests directory and set it to Bluetooth
controller maintainer (cvinayak) and the Bluethooth controller LLCP
refactoring team.
Signed-off-by: Thomas Ebert Hansen <thoh@oticon.com>
Added basic support for the RP2040 SoC. Support
includes booting and starting the kernel, on one
core only.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds the `gen_image_info.py` script which supports creation
of a header file with image information from the EFL file.
This version populates the header file with:
- Number of segments in the image
- LMA address of each segment
- VMA address of each segment
- Size of each segment
The header file can be used by a secondary build system which needs this
information.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The MIPS Malta is an ATX form factor evaluation board made by MIPS
Technologies. Malta board is the most popular platform for MIPS
full-system emulation.
See https://www.linux-mips.org/wiki/MIPS_Malta for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
The MIPS Malta is an ATX form factor evaluation board made by MIPS
Technologies. Malta board is the most popular platform for MIPS
full-system emulation.
See https://www.linux-mips.org/wiki/MIPS_Malta for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Remy Luisant <remy@luisant.ca>
MIPS (Microprocessor without Interlocked Pipelined Stages) is a
instruction set architecture (ISA) developed by MIPS Computer
Systems, now MIPS Technologies.
This commit provides MIPS architecture support to Zephyr. It is
compatible with the MIPS32 Release 1 specification.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
This adds skeleton Kconfig/CMakeLists.txt and common implementation
of some sys_mm_drv_*() functions.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is a single board computer for spacecraft OBC (On-board Computer).
It has a Xilinx FPGA with Cortex ARM M3 core with peripherals, UART, CAN
and others.
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Getopt has been moved from /lib/utils to /lib/posix hence
CODEOWNERS must be updated accordingly.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
This provides the infrastructure to create network packet filter rules
and to apply them to the RX and TX packet paths. Rules are made of
simple condition tests that can be linked together, creating a facility
similarly to the Linux iptables functionality.
A couple of generic and Ethernet-specific condition tests are also
provided.
Additional tests can be easily created on top of this.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
SiPeed Longan Nano is a minimal development board
based on GigaDevice's RISC-V processor.
There are 2 board variations.
longan_nano: GDGD32VF103CBT6 (128K Flash/32K SRAM)
longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM)
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Implemented driver for the simcom sim7080 modem.
This driver features Socket offloading, TCP, UDP, DNS,
SMS, GPS and FTP.
Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
Promote the Controller Area Network (CAN) subsystem reference
documentation from being part of the networking subsystem documentation
to having its own section.
The networking subsystem primarily deals with IP-based networking,
whereas CAN is a subsystem of its own.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Prepare the driver to upcoming support of more mux references.
Rename all TCA9546A related files to TCA954x.
Keep ti,tca9546a and ti,tca9546a-channel compatible
for backward compatibility reasons.
New tca954x-base binding embedding common properties,
tca9546a binding inherits from it and define its own compatibles fields.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This commit adds a generic i2c regulator driver, and enables the NXP
PCA9420 PMIC IC using this driver. The regulator driver also exposes an
additional API in include/drivers/regulator/consumer.h, which allows
drivers to implement support for adjusting voltage levels and current
limits, if their device supports it.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit adds Xen consoleio serial driver. It is needed to receive
kernel messages from Zephyr in case it runs as Xen privileged domain
(Dom0). There is no console ring buffer for such domain, so regular
uart_hvc_xen driver can not be used (privileged domain input/output
are possible only through consoleio interface).
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Make the timer drivers expression more generic to cover both
implementation and Kconfig files.
Missing drivers were added to pass compliance checks. Owners added based
on maintainership, driver author, etc.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This script can be used to automatically migrate the Devicetree files of
nRF-based boards using the old <signal>-pin properties to select
peripheral pins. The script will parse a board Devicetree file and will
first adjust that file by removing old pin-related properties replacing
them with pinctrl states. A board-pinctrl.dtsi file will be generated
containing the configuration for all pinctrl states. Note that script
will also work on files that have been partially ported.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This is dead code. It's based on the cAVS "IPC" mechanism to allow
communication to and from the host CPU. But there is no test rig in
the Zephyr tree for the protocol defined. And in fact the only
Zephyr-based user of the IPC mechanism (Sound Open Firmware) has its
own IPC driver and speaks its own protocol with the host kernel. That
driver needs to migrate into Zephyr soon and this legacy bit is just
confusing.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Add Andes developers, kevinwang821020 and jimmyzhe as reviewers for
andes_v5 soc, board, dts, and drivers.
Remove Teng-Shih-Wei from reviewers because he doesn't maintain
Zephyr RTOS currently.
Signed-off-by: Jim Shu <cwshu@andestech.com>
IT8XXX2 uses shared ns16550.c driver which does not provide a power
management callback(pm_action_cb), so create driver to handle
IT8XXX2 specific UART features.
note: pm_action_cb(old name: pm_control_fn)
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Removing maintainer and/or collaborator status on
- nRF platforms
- TF-M
- userspace
- cmsis-dsp
- MAINTAINERS file
for ioannisg. Replace with @anangl or others, where applicable.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
I'm taking over for joerchan at Nordic Semiconductor as a Zephyr
Bluetooth host collaborator.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
Add GigaDevice ISP console flash runner. This tool enable uses ROM
bootloader to flash devices using serial port.
The GD32_ISP_Console tool can be found at
http://www.gd32mcu.com/download/down/document_id/175/path_type/1
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
In order to have Espressif SoCs working with
the same uart drivers, all low level functions
are now replaced to hal_espressif HAL calls.
This also changes pinmux, gpio and uart
init order to meet its dependencies.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Added watchdog implementation which is using counter device
to implement watchdog driver API. Watchdog timeout is called from
counter interrupt context. Some counter implementations support
using ZLI interrupt level which can be use here as well. Watchdog
like this can be used along hardware watchdog to cover for its
limitations, i.e. Nordic watchdog resets unconditionally after
62uS after triggering watchdog interrupt. It is not enough time
to dump logging data.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This commit adds minimal support of Xen hypervisor console via UART-like
driver. Implementation allows to use poll_in/poll_out char interface for
uart_console.c driver directly to HV console instead of using Xen
virtual PL011 UART. Future implementation will support interrupt driven
interface on Xen event channels, currently it is under development.
Also this commit introduces early console_io Xen interface, which allows
to receive printk/stdout messages quickly after start, but requires Xen,
built with CONFIG_DEBUG option.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Add SoC-specific code, the basic device tree and Kconfig data as well
as the corresponding linker command file for the Xilinx Zynq-7000
family of SoCs. This SoC - either as a QEMU simulation or on actual
hardware such as the Avnet/Digilent ZedBoard - is suitable as an ini-
tial target for the ARMv7 Cortex-A support.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Include the CANopenNode module integration files in the CAN bus
maintainers group and assign ownership to me.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.
If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.
This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This is a driver for the Synopsys DesignWare MAC. It should work
with the "DesignWare Cores Ethernet Quality-of-Service" versions 4.x
and 5.x.
This driver uses a zero-copy strategy, meaning that the hardware
reads and writes data directly from/to packet fragment buffers
provided by the network subsystem without first copying the data into
a dedicated DMA bounce buffer.
Platform specific setup is necessary for the hardware to work.
Currently, only the STM32H7X series is implemented and tested.
While this part needs refinement, this driver performs better and uses
far less code space than the HAL-based alternative.
Not yet implemented:
- MDIO (it is WIP, currently relying on default PHY config)
- PTP support
- VLAN support
- various hardware offloads (when available)
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Take ownership of all the neorv32 specific files (dts bindings, soc
implementation, drivers, and board definition).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This is used by autoPTS project so make sure Szymon is aware of all
changes in tester application.
Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
Import any manifest files in a new 'submanifests' directory into
west.yml.
This lets users define custom zephyr modules or easily override
built-in modules by dropping their own manifest files into
submanifests/some-user-file.yaml.
Provide an example and a README with links to the relevant
documentation in 'submanifests' to get users started.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Add an application agnostic State Machine Framework library to
Zephyr that provides an easy way for developers to integrate
state machines into their application.
Twister passed:
twister -T tests/lib/smf/
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
1. Add support for multiple syscon entries (as a side effect, this also
fixed syscon.c implementations which weren't being linked to their
syscon.h counterparts).
2. Add support for different width registers in syscon.
3. Add tests for syscon
Signed-off-by: Yuval Peress <peress@chromium.org>
This adds driver for EOS_S3 SoC FPGA.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Add a shim that allows using the nrfx PDM driver via the Zephyr API.
Add also missing devicetree nodes representing the PDM peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-pdm" binding with a new property that allows
specifying the clock source to be used by the PDM peripheral (so that
it is possible to use HFXO for better accuracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This script allows us to programmatically query bug-bashers within
a user-supplied time-window.
For example, we held a "Bug Bash Week" August 1-7, 2021 (it was
announced a week early though). The output of the script prints
the "top ten" bug bashers in tab-separated columns in descending
order. The first column is the number of bugs squashed and the
second column is the github user id.
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
Add myself and Teng-Shih-Wei as owners for andes_v5 soc series, dts,
adp_xc7k_ae350 board, and device drivers from Andes.
Signed-off-by: Jim Shu <cwshu@andestech.com>
to make use of Espressif's hal in order to ease both
driver maintenance and code reuse between socs.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit adds support for Ethernet PHY drivers via a PHY API.
It also includes a driver for a generic MII compliant PHY
which supports most PHYs on the market.
Separating PHY driver from the SoC specific Ethernet driver
simplifies the Ethernet driver code and enables code re-use.
Drivers for specific PHYs with more advanced features, such as
RGMII delay in PHY can be developed independent of the Ethernet
MAC driver.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
This commit adds support for the Legend 2.5" boards (legend25_ssd and
legend25_hdd) based on the STM32F070CB MCU. These boards can be found in
the Seagate FireCuda Gaming Drive, Gaming Drive for Xbox, SSD Gaming
Drive for Xbox, and Gaming Drive for PlayStation devices. Both boards
contain the following hardware components:
- A B1414 LED strip connected to the PA7 pin (SPI MOSI)
- A SPI flash (FM25F005) connected on SPI2 bus
The Legend 2.5" HDD board also contains an activity LED connected on
TIM3 CH3
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
based on uart rom functions, also enable console driver
on top of this driver, which enables logging
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
We try to reduce the ambiguity between 'soc/nuvoton/' and
'soc/nuvoton_npcx' folders. Most if soc vendors name their soc folder by
the company name with SOC_FAMILY suffix instead of the company name
directly. It is clearer if the soc company has different product lines
that aim to specific markets.
In this CL, the 'numicro' suffix is used for Nuvoton Microcontroller
production line. It distinguishes the 'npcx' suffix that used for
Nuvoton Embedded Controller (EC) of Notebook PC product line.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The driver only support use case where the channels are used in mutual
exclusion.
Origin: Original
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
based on uart rom functions, also enable console driver
on top if this driver enabling logging
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
Add a shim that allows using the nrfx I2S driver via the Zephyr API.
Add also missing devicetree nodes representing the I2S peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-i2s" binding with a new property that allows
specifying the clock source to be used by the I2S peripheral (so that
it is possible to use HFXO for better accurracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
All the macro for dma-cells are now in the
include/drivers/dma/dma_stm32.h header file.
So the include/dt-bindings/dma/stm32_dma.h is no more
useful and removed from #include.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move @MulinChao, @WealianLiao, and myself from code owners entry
dts/arm/nuvoton/npcx to dts/arm/nuvoton.
So we will be chosen as reviewers automatically when dtsi files under
dts/arm/nuvoton are touched.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
A syscon device is a device managing a memory region containing a set of
registers that are not cohesive enough to represent as any specific type
of device. We need a driver for that because several other drivers could
use the same region at the same time and we need to io-map the region at
boot for MMU enabled platforms.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This patch add support for I2C on the Renesas R-Car.
This I2C hardware block can be found on various Renesas R-Car
SoC series.
It allows to perfom read and write on I2C buses in an
interrupt based way on R-Car Gen3 H3ULCB board.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This commit adds a serial dummy driver compatible to vnd,serial.
This is needed that devices can access the uart device in tests
like tests/drivers/build_all/... .
Add myself as codeowner to avoid complicance check failure.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds the dts definitons for the seeed lora-e5 module.
Additionally I add myself as codeowner for the new dts/arm/seeed
directory.
This module packages a stm32wle5jc Sub-GHz Wireless Soc,
together with a 32MHz TCXO, a 32.768KHz crystal oscillator, and
power and RF circuitry.
With the introduction of lora support definitions for the radio
will be added in a future commit.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Not enough time to review changes in these subsystems.
Propose to have VenkatKotakonda as KSCAN subsystem owner instead.
Adding SoC-specific driver owners.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Add the code owner entries for all files related to the Xilinx GEM
Ethernet device driver.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
I cannot invest the time required for maintaining the networking
stack anymore, so I am stepping down from the maintainer role.
I am proposing Rober Lubos to be a new network maintainer.
I have been working with him for several years, and he is always
very helpful and knowledgeable to review and comment patches and
issues. He knows the network stack well and will for sure be able
to handle the task as he has been doing the maintenance already
for a long time.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
Adding support for beagleV Starlight board based on Starfive JH7100
SoC. It's a base support, no drivers other than uart has been tested.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
Convert the keyscan portion of the Holtek HT16K33 driver to adhere to
the kscan API instead of the GPIO API.
When this driver was introduced the kscan API was not present. The
keyscan driver was therefore implemented as a GPIO interrupt driver.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Adds @Thalley and @asbjornsabo (and the others
from the parent directory) to the babblesim audio
test directory.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
This driver is for classic CAN, it makes use of CAN interface
in FIFO mode.
This driver support Standard ID as well as Extended ID.
Tested on H3ULCB, Ebisu platform, with external adapter and
in loopback mode.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Modify support for u-blox BMD-345-EVAL which uses the nRF52840
and a Skyworks RFX2411 FEM.
These edits follow the naming cnoventions that is used
with the other u-blox EVKs recently added, or in progress
This board is similar to the nRF52840dk_nrf52840 with the
addition of a FEM. Four Arduino GPIO pins have been
reassigned to the PA_LNA control pins.
u-blox would prefer to use this naming convention to match
other BMD-3xx-EVAL and EVK-NINA-Bx boards recently submitted.
Tested with blinky, button, and Bluetooth peripheral_hr
Checking dts files
Updated CODEOWNERS to rename bmd_345_eval to ubx_bmd345eval_nrf52840
Added CMakeLists.txt, updated board.c
Signed-off-by: Bob Recny <bob.recny@u-blox.com>
The cache API currently shipped in Zephyr is assuming that the cache
controller is always on-core thus managed at the arch level. This is not
always the case because many SoCs rely on external cache controllers as
a peripheral external to the core (for example PL310 cache controller
and the L2Cxxx family). In some cases you also want a single driver to
control a whole set of cache controllers.
Rework the cache code introducing support for external cache
controllers.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Modern hardware all supports a TSC_DEADLINE mode for the APIC timer,
where the same GHz-scale 64 bit TSC used for performance monitoring
becomes the free-running counter used for cpu-local timer interrupts.
Being a free running counter that does not need to be reset, it will
not lose time in an interrupt. Being 64 bit, it needs no rollover or
clamping logic in the driver when presented with a 32 bit tick count.
Being a proper comparator, it will correctly trigger interrupts for
times set "in the past" and thus needs no minimum/clamping logic. The
counter is synchronized across the system architecturally (modulo one
burp where firmware likes to change the adjustment value) so usage is
SMP-safe by default. Access to the 64 bit counter and comparator
value are single-instruction atomics even on 32 bit systems, so it
beats even the RISC-V machine timer in complexity (which was our
reigning champ for "simplest timer driver").
Really this is just ideal for Zephyr. So rather than try to add
support for it to the existing APIC driver and increase complexity,
make this a new standalone driver instead. All modern hardware has
what it needs. The sole gotcha is that it's not easily emulatable
(qemu supports it only under kvm where they can freeload on the host
TSC) so it can be exercised only on hardware platforms right now.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
