zephyr/dts/bindings/clock
Guillaume Gautier 24680021b7 dts: bindings: clock: add bypass property to stm32 lse
For STM32 LSE clock, add LSE bypass property (defaulting to false)

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2022-11-10 11:27:49 +00:00
..
aspeed,ast10x0-clock.yaml dts: bindings: clock: add binding for Aspeed AST10x0 clock 2022-07-28 08:30:27 +02:00
atmel,samc2x-gclk.yaml soc: atmel: add base support for C2x SOC 2022-11-04 16:03:01 +01:00
atmel,samc2x-mclk.yaml soc: atmel: add base support for C2x SOC 2022-11-04 16:03:01 +01:00
atmel,samd2x-gclk.yaml dts: atmel: sam0: Add initial clock devicetree support 2020-04-22 21:34:21 -05:00
atmel,samd5x-gclk.yaml dts: atmel: sam0: Add initial clock devicetree support 2020-04-22 21:34:21 -05:00
atmel,samd5x-mclk.yaml dts: atmel: sam0: Add initial clock devicetree support 2020-04-22 21:34:21 -05:00
atmel,saml2x-gclk.yaml soc: atmel_sam0: Add support for SAML21 parts 2022-07-18 10:35:46 +00:00
atmel,saml2x-mclk.yaml soc: atmel_sam0: Add support for SAML21 parts 2022-07-18 10:35:46 +00:00
clock-controller.yaml
espressif,esp32-rtc.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
fixed-clock.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
fixed-factor-clock.yaml dts: bindings: fix file names 2021-10-20 07:33:04 -04:00
gd,gd32-cctl.yaml drivers: clock_control: gd32: initial support 2022-09-06 09:57:25 +02:00
intel,adsp-shim-clkctl.yaml boards, dts: fix filenames and dts refs for adsp clock 2022-09-14 07:23:08 -04:00
intel,agilex-clock.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
litex,clk.yaml dts: Cleanup litex,clk binding 2021-02-03 13:41:47 -05:00
litex,clkout.yaml dts: cleanup few cases of space before colon 2021-01-15 08:32:53 -06:00
microchip,xec-pcr.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
nordic,nrf-clock.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
nordic,nrf-oscillators.yaml dts: Add missing nodes and bindings for peripherals present in nRF SoCs 2022-04-02 15:14:38 +02:00
nuvoton,npcx-pcc.yaml dts: pcc: npcx: add properties of pcc node to configure clock settings 2021-06-21 18:47:31 -04:00
nxp,imx-anatop.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
nxp,imx-ccm-rev2.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
nxp,imx-ccm.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
nxp,kinetis-ke1xf-sim.yaml dts: bindings: nxp: Move clock controller bindings 2022-07-25 16:14:18 -07:00
nxp,kinetis-mcg.yaml dts: bindings: nxp: Move clock controller bindings 2022-07-25 16:14:18 -07:00
nxp,kinetis-pcc.yaml dts: bindings: nxp: Move clock controller bindings 2022-07-25 16:14:18 -07:00
nxp,kinetis-scg.yaml dts: bindings: nxp: Move clock controller bindings 2022-07-25 16:14:18 -07:00
nxp,kinetis-sim.yaml dts: bindings: nxp: Move clock controller bindings 2022-07-25 16:14:18 -07:00
nxp,lpc11u6x-syscon.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
nxp,lpc-syscon.yaml dts: bindings: clock: device labels are now optional 2022-07-18 10:39:32 +00:00
renesas,r8a7795-cpg-mssr.yaml drivers: clock: rcar: Deploy a driver for each soc 2022-06-28 18:11:44 +02:00
renesas,rcar-cpg-mssr.yaml drivers: clock: rcar: Deploy a driver for each soc 2022-06-28 18:11:44 +02:00
st,stm32-clock-mux.yaml dts/bindings/clocks: Add stm32 clock mux binding 2022-05-10 18:42:30 +02:00
st,stm32-hse-clock.yaml dts/bindings: clocks: Add new STM32 clock bindings 2021-04-27 11:53:37 +02:00
st,stm32-lse-clock.yaml dts: bindings: clock: add bypass property to stm32 lse 2022-11-10 11:27:49 +00:00
st,stm32-msi-clock.yaml dts/bindings: clocks: Add new STM32 clock bindings 2021-04-27 11:53:37 +02:00
st,stm32-rcc.yaml dts: bindings: clocks stm32: Clock selection rewording and clarification 2022-08-08 14:17:07 +02:00
st,stm32f0-pll-clock.yaml dts/bindings: clocks: Add bindings for F0/F3/G0/G4 2021-04-29 16:41:26 +02:00
st,stm32f0-rcc.yaml dts/bindings: clocks: Add bindings for F0/F3/G0/G4 2021-04-29 16:41:26 +02:00
st,stm32f1-pll-clock.yaml dts/bindings: clocks: Add STM32F1 PLL bindings 2021-04-29 16:41:26 +02:00
st,stm32f2-pll-clock.yaml dts/bindings/clock: Add bindings for STM32F2 2021-04-29 16:41:26 +02:00
st,stm32f4-pll-clock.yaml dts/bindings: clocks: Add new STM32 clock bindings 2021-04-27 11:53:37 +02:00
st,stm32f7-pll-clock.yaml dts/bindings/clock: Add bindings for STM32F7 2021-04-29 16:41:26 +02:00
st,stm32f100-pll-clock.yaml dts/bindings: clocks: Add binding for stm32f100 pll 2021-05-04 13:02:26 -05:00
st,stm32f105-pll2-clock.yaml dts/bindings: clocks: Add STM32F1 PLL bindings 2021-04-29 16:41:26 +02:00
st,stm32f105-pll-clock.yaml dts/bindings/clocks: st,stm32f105-pll-clock.yaml: previd is required 2022-04-21 14:09:44 +02:00
st,stm32g0-hsi-clock.yaml dts: bindings: clock add stm32go hsi binding 2022-07-04 15:20:06 +02:00
st,stm32g0-pll-clock.yaml dts/bindings: clocks: Add bindings for F0/F3/G0/G4 2021-04-29 16:41:26 +02:00
st,stm32g4-pll-clock.yaml dts: bindings: clock stm32g4 has a PLL P divider 2022-03-23 09:25:47 -05:00
st,stm32h7-hsi-clock.yaml dts/bindings: clocks: Add clocks bindings for stm32h7 series 2021-05-03 10:56:05 +02:00
st,stm32h7-pll-clock.yaml dts/bindings: clocks: Add clocks bindings for stm32h7 series 2021-05-03 10:56:05 +02:00
st,stm32h7-rcc.yaml dts: bindings: clocks stm32: Clock selection rewording and clarification 2022-08-08 14:17:07 +02:00
st,stm32l0-msi-clock.yaml dts/bindings/clocks: stm32l0-msi-clock: Use enum for allowed values 2022-04-21 14:09:44 +02:00
st,stm32l0-pll-clock.yaml dts/bindings/clock: Add bindings for L0/L1 2021-04-29 16:41:26 +02:00
st,stm32l4-pll-clock.yaml dts/arm/st: l5: Add clocks node to stm32l5.dtsi 2021-04-29 16:41:26 +02:00
st,stm32mp1-rcc.yaml dts: stm32: Add rcc prop undershoot-prevention 2022-04-21 14:09:44 +02:00
st,stm32u5-msi-clock.yaml dts/arm/st: Add stm32u5 base and initial device 2021-07-29 07:28:32 -05:00
st,stm32u5-pll-clock.yaml drivers: clock_control: stm32u5: Update condition on PLL1R values 2022-07-30 08:23:35 -05:00
st,stm32u5-rcc.yaml dts: stm32: Add rcc prop undershoot-prevention 2022-04-21 14:09:44 +02:00
st,stm32wb-pll-clock.yaml dts/bindings: clocks: Add stm32wl-rcc and fix stm32wb-pll-clock 2021-04-29 16:41:26 +02:00
st,stm32wb-rcc.yaml dts/bindings/clock: st-stm32(wb)-rcc: Clarify 'clock-frequency' meaning 2022-04-21 14:09:44 +02:00
st,stm32wl-hse-clock.yaml dts/bindings: Add binding for STM32WL HSE Clock 2021-08-24 07:19:12 -04:00
st,stm32wl-rcc.yaml dts/bindings: clock: cpu2-prescaler is optional on stm32wl 2021-11-03 16:19:06 -04:00