Commit Graph

114537 Commits

Author SHA1 Message Date
Yangbo Lu
faa55bd44b drivers: ptp_clock_nxp_enet: avoid configuring IRQ handlers again
Converted ENET_Ptp1588Configure to ENET_Ptp1588StartTimer during reset.
This is to avoid configuring IRQ handlers again in hal driver with
ENET_Ptp1588Configure.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-05-02 09:17:12 +02:00
Yangbo Lu
0e4a334f1c drivers: ptp_clock_nxp_enet: adjust rate based on nominal frequency
The rate adjustment should be based on nomianl frequency, but not
current frequency. Then any PTP stack with PID control could adjust
frequency well.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-05-02 09:17:12 +02:00
Yangbo Lu
383d4f499e drivers: eth_nxp_enet: fix data share with ptp driver
The enet handle in mac driver was not shared with ptp driver
properly. This was causing wrong TX timestamp.
This patch is to fix it.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-05-02 09:17:12 +02:00
Yangbo Lu
0415ba0452 drivers: clock_control_mcux_ccm: use fixed 25M for PTP on RT10XX
The RT10XX uses fixed 25M for PTP clock per RM. Verified on
RT1060.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-05-02 09:17:12 +02:00
Amaan Singh
ef93b1437c qdec: Add STM32F2 support via overlay for nucleo_f207zg
Add a disabled st,stm32-qdec node to TIM3 for STM32F2-based MCUs.
This enables QDEC support via devicetree overlays and simplifies
usage on boards such as nucleo_f207zg.

Signed-off-by: Amaan Singh <amaansingh160@gmail.com>
2025-05-02 09:16:54 +02:00
Amaan Singh
7a74842f95 dts: stm32: Add st,stm32-qdec support to TIM1-TIM5 & TIM8 for STM32F2
Add disabled qdec subnodes to timers TIM1 through TIM5 and TIM8
for STM32F2 series MCUs. This enables Zephyr to provide consistent
QDEC support across all supported encoder-capable STM32 timers.

Signed-off-by: Amaan Singh <amaansingh160@gmail.com>
2025-05-02 09:16:54 +02:00
Ali Hozhabri
5762117d05 boards: shields: x_nucleo_wb05kn1: Update documentation
The documentation is updated to give more information regarding the SPI
default settings and the necessity to change the out-of-the-box firmware
to be compatible with Zephyr.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2025-05-02 09:16:23 +02:00
Mirai SHINJO
143859dece boards: nucleo_h753zi: add die_temp support
This commit enables die_temp support by configuring ADC3 and adding
the die_temp0 alias to the devicetree of the nucleo_h753zi board.

This change has been tested using the die_temp_polling sample.

Signed-off-by: Mirai SHINJO <oss@mshinjo.com>
2025-05-02 09:16:11 +02:00
Martin Jäger
70947968d4 soc: stm32: common: wkup_pins: fix log output
Remove newline in log output and simplify log message.

Signed-off-by: Martin Jäger <martin@libre.solar>
2025-05-02 09:15:59 +02:00
Aksel Skauge Mellbye
3a2f839d45 doc: bindings-syntax: Document requirements for title property
Add documentation for the expectations for the title property
in devicetree bindings.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-05-02 09:15:50 +02:00
Aksel Skauge Mellbye
4b4d40017a dts: bindings: silabs: Clean up descriptions, add titles
Clean up dt binding descriptions and introduce titles where
needed to make board documentation pages look nice. The supported
hardware table on board documentation pages sources its data
from dt bindings, and needs succinct titles.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-05-02 09:15:50 +02:00
Aksel Skauge Mellbye
b2451ca109 doc: _extensions: zephyr: Use binding title in supported hw table
Use the title property from bindings in the supported hardware table
if available.

Create <abbr> elements for acronyms and abbreviations in titles.
Abbreviations are not created when the description field is used as
a title, since existing text in bindings was not created with this
in mind, and parentheses are used in the text in ways that are
incompatible with the auto-abbreviating logic.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-05-02 09:15:50 +02:00
Aksel Skauge Mellbye
2e442e0ad5 doc: _scripts: Expose title from dt binding in board catalog
Make the recently added `title` attribute in dt bindings available
in the board catalog used by the board supported hardware directive.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-05-02 09:15:50 +02:00
Aksel Skauge Mellbye
73b8d1b637 edtlib: Expose binding title in node class
Make the binding title available from the node the same way
the binding description is propagated.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-05-02 09:15:50 +02:00
IBEN EL HADJ MESSAOUD Marwa
9dfca6506b boards: st: nucleo_c071rb: Add the usb and usbd test features
Add the usb_device and usbd test features to nucleo_c071rb.yaml

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
2025-05-02 09:15:41 +02:00
IBEN EL HADJ MESSAOUD Marwa
a6d766e185 boards: st: nucleo_c071rb: Enable USB peripheral
Enable the USB node of the nucleo_c071rb board

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
2025-05-02 09:15:41 +02:00
IBEN EL HADJ MESSAOUD Marwa
1a8f5ba0da dts: arm: st: c0: Add USB device node
Added USB device node with compatible "st,stm32-usb".
Added usb_fs_phy node with compatible "usb-nop-xceiv".

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
2025-05-02 09:15:41 +02:00
IBEN EL HADJ MESSAOUD Marwa
2e59e8207a include: zephyr: dt-bindings: Add STM32C0 USB clock selection support
- Defined CCIPR2_REG offset.
- Added USB_SEL(val) macro to support USB clock selection using CCIPR2_REG.

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
2025-05-02 09:15:41 +02:00
Jeppe Odgaard
c3a9fb1c63 driver: sensor: tmp11x: support get offset
Allow reading the offset register.

This allows reading the offset before setting it if offset is set more than
once.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-05-02 09:15:33 +02:00
Jordan Yates
8cebd99066 samples: st: power_mgmt: blinky: enable PM on GPIOs
Enable runtime PM on each GPIO port to preserve the legacy PM GPIO
behaviour for this sample.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-05-02 09:15:26 +02:00
Jordan Yates
41fe3b9d24 gpio: stm32: initialise according to zephyr,pm-device-runtime-auto
Don't automatically disable all GPIO ports just because
`PM_DEVICE_RUNTIME` is enabled. Require the user to explicitly call
`pm_device_runtime_enable` on the port, or add
`zephyr,pm-device-runtime-auto` to the devicetree node.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-05-02 09:15:26 +02:00
cyliang tw
3bf1ee7cb0 tests: drivers: adc: adc_api: support numaker_m55m1
Add support for Nuvoton numaker board numaker_m55m1.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-05-02 07:20:34 +02:00
cyliang tw
082a3a0878 dts: arm: nuvoton: add adc node of numaker m55m1x
Update m55m1x.dtsi, to add adc node for adc driver support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-05-02 07:20:34 +02:00
Andrej Butok
25a2196ac9 boards: nxp: imx-flexspi-nor: add missing sizes for is25wp064
Adds erase-block-size and write-block-size
for is25wp064 nxp,imx-flexspi-nor.

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-05-02 07:20:24 +02:00
Lin Yu-Cheng
1e71a79ba1 soc : realtek: ec: rts5912: add soc rts5915 config
Add the config for user to chose rts5915

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-05-02 07:20:13 +02:00
Troels Nilsson
6a5fa60ad4 Bluetooth: Controller: Fix missing window widening in ull_periph_setup
No window widening was applied to conn_offset_us causing the initial
ticker_cb to get called slightly too late

Apply window_widening_periodic_us to conn_offset_us, since this is the
worst-case window widening (win_offset is not allowed to be larger than
a connection interval) and is applied in the LLL window size already

Fixes EBQ failure in LL/TIM/PER/BV-02-C

Signed-off-by: Troels Nilsson <trnn@demant.com>
2025-05-02 07:20:03 +02:00
Alvis Sun
7e23f8b408 soc: add npck soc driver
For npck3m8k:
1. Update code ram from 320KB to 416KB (0x1005_8000~0x100B_FFFF).
2. Update data ram from 32KB to 64KB.
3. Move fiudiv from hfcbcd1 to hfcbcd2 register

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-05-02 07:19:55 +02:00
Alvis Sun
488526190f dts: arm: npcx: Add dts files for NPCK3 series
K3 series is a Nuvoton embedded controller based on NPCX series.
Add npck3m8k dtsi

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-05-02 07:19:55 +02:00
Khoa Nguyen
d63aac0d3d tests: drivers: flash: Add support "common" for Renesas ek_ra4l1
Add support test app "flash/common" for Renesas RA ek_ra4l1

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-05-02 07:19:46 +02:00
Khoa Nguyen
3e2a243edb boards: renesas: Add support Flash-HP for Renesas ek_ra4l1
Add storage partition and flash support for Renesas ek_ra4l1

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-05-02 07:19:46 +02:00
Khoa Nguyen
6026d339b3 dts: arm: renesas: Add support Flash-HP for Renesas RA4L1
Add support Flash-HP for Renesas RA4L1 SoC

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-05-02 07:19:46 +02:00
Khoa Nguyen
c0048f1beb dts: arm: renesas: Update Flash-HP node for Renesas SoC
Update Flash-HP node for all Renesas SoCs that enabled support

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-05-02 07:19:46 +02:00
Khoa Nguyen
d9032f03f2 drivers: flash: Update driver flash to support Flash-HP for RA4L1
Update source flash driver to support Flash-HP for RA4L1

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-05-02 07:19:46 +02:00
Khoa Nguyen
b9160aab15 manifest: Update hal_renesas for Flash-HP support ek_ra4l1
Update hal_renesas for Flash-HP support ek_ra4l1

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-05-02 07:19:46 +02:00
Khoa Nguyen
9088261efd drivers: flash: Correct naming of Flash HP Renesas RA Kconfig
Correct naming of Flash HP Renesas RA Kconfig

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-05-02 07:19:46 +02:00
Khoa Nguyen
f305a339b3 drivers: flash: Update naming for flash driver of Renesas RA
Update naming for flash driver of Renesas RA

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-05-02 07:19:46 +02:00
Khoa Nguyen
575a95de65 drivers: flash: Remove Dual mode feature for Renesas flash-HP
Since the Dual Mode feature doesn't actually work when selected,
and we also realize that we can't support key features of dual
mode, such as bank swap using hardware.
As a solution, we desire to remove this Dual mode feature.

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-05-02 07:19:46 +02:00
Ofir Shemesh
999b19d6ce soc: nxp: imxrt: fix incorrect flexram partition function call
Replace incorrect call to memc_flexram_dt_partition() with
flexram_dt_partition() to resolve build error on
IMXRT10xx and IMXRT11xx.

Signed-off-by: Ofir Shemesh <ofirshemesh777@gmail.com>
2025-05-02 01:17:13 +02:00
Martin Jäger
403299c40b samples: boards: st: power_mgmt: wkup_pins: add nucleo_g031k8
Add overlay for above board for testing. As the board does not have an
actual button, PA0 has to be connected to GND for wake-up.

Signed-off-by: Martin Jäger <martin@libre.solar>
2025-05-02 01:17:02 +02:00
Martin Jäger
bb0e580be4 soc: stm32g0x: add poweroff implementation
Same implementation as stm32c0x and stm32l4x. This is required
for wake-up from sleep.

Signed-off-by: Martin Jäger <martin@libre.solar>
2025-05-02 01:17:02 +02:00
Martin Jäger
d65149e210 dts: arm: stm32g0: add pwr node and wkup-pins
WKUP3 is only available for g0b0/1 and g0c1 variants.

WKUP5 is only available in larger packages. However, package sizes
are currently not considered in the devicetree file schema for STM32.

Signed-off-by: Martin Jäger <martin@libre.solar>
2025-05-02 01:17:02 +02:00
Chris Friedt
0cac1849ca doc: kernel: mark k_event apis as being ISR safe
Most of the k_event APIs are ISR-safe, with the exception of

* k_event_init() - object should be initialized before ISR context
* k_event_wait(), k_event_wait_all() - only ISR safe with K_NO_WAIT

The last two functions already check for K_NO_WAIT when in ISR context
so this is very much just updating documentation to reflect the
current state.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-05-02 01:16:46 +02:00
Chris Friedt
36c44045a0 kernel: events: prevent k_event_init() from being called in an ISR
Most kernel objects should be initialized well before being
manipulated in ISR context.

Event objects are no exception. Initializing a k_event object in
ISR context would implicitly be racey and introduce an element of
non-determinism.

Assert that k_event_init() is not called from ISR context.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-05-02 01:16:46 +02:00
Hake Huang
c10e6eaf07 soc: mimxrt11xx: update the frdmram api
flexram api change to misc.

fixes: #89150

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2025-05-02 01:16:37 +02:00
Hake Huang
61e1dc963c samples: magic_addr: move the config to app.overlay
move the board config to app.overlay, as it is
a general dts settings

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2025-05-02 01:16:37 +02:00
Derek Snell
26423f2020 soc: nxp: mcxn: configure CPU1 TrustZone access level
Configures AHBSC MASTER_SEC_LEVEL register for the cpu1 before cpu1 is
enabled.  By default, this gives CPU1 secure and privileged access to
the rest of the SOC, same as CPU0.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2025-05-02 01:16:26 +02:00
Derek Snell
01ca78b227 Revert "boards: nxp: frdm_mcxn947: enable GPIO in all modes"
This reverts commit feb966df36cbb8b6d847b9f0873bc79195e7fd22.  That
change makes GPIO registers inaccessible from cpu0.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2025-05-02 01:16:26 +02:00
Keith Packard
2d64237f44 cmake: Enable undefined behavior sanitizer on all targets
GCC and Clang support the undefined behavior sanitizer in any
configuration, the only restriction is that if you want to get nice
messages printed, then you need the ubsan library routines which are only
present for posix architecture or when using picolibc.

This patch adds three new compiler properties:

 * sanitizer_undefined. Enables the undefined behavior sanitizer.
 * sanitizer_undefined_library. Calls ubsan library routines on fault.
 * sanitizer_undefined_trap. Invokes __builtin_trap() on fault.

Overhead for using the trapping sanitizer is fairly low and should be
considered for use in CI once all of the undefined behavior faults in
Zephyr are fixed.

Signed-off-by: Keith Packard <keithp@keithp.com>
2025-05-02 01:16:18 +02:00
Alex Fabre
1fdad5cc29 doc: toolchain: atfe: arm toolchain for embedded documentation
Arm Toolchain for Embedded (ATfE) is the next-generation Arm embedded
C/C++ compilation toolchain.

Arm Toolchain for Embedded is 100% open source. Arm is investing in the
LLVM linker and minor tools, and in the Picolib C library, to create a
performant 100% open source compilation toolchain for embedded
development with Arm-based designs.

The proprietary components used in Arm Compiler for Embedded 6 (the
linker, C library, and binutils carried over from the legacy Arm
Compiler 5 toolchain) are retired in favour of their open source
(LLVM and Picolib) equivalents.

Product page: https://developer.arm.com/Tools%20and%20Software/Arm%20Toolchain%20for%20Embedded
Github repo: https://github.com/arm/arm-toolchain

Signed-off-by: Alex Fabre <alex.fabre@rtone.fr>
2025-05-02 01:16:08 +02:00
Alex Fabre
6e5554b383 doc: toolchain: ac6: update documentation filename
This update changes the filename from 'arm_compiler.rst' to
'arm_compiler_6.rst' to accurately reflects its focus on AC6.

Recently, Arm introduced the Arm Toolchain for Embedded (ATfE), which is
distinct from AC6. This 7th generation compiler is entirely open source
for the first time. To distinguish it from AC6 and highlight it's a
complete toolchain rather than just a compiler, this new version will
be named Arm Toolchain for Embedded (ATfE).

Signed-off-by: Alex Fabre <alex.fabre@rtone.fr>
2025-05-02 01:16:08 +02:00