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drivers: flash: Update driver flash to support Flash-HP for RA4L1

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Update source flash driver to support Flash-HP for RA4L1

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
This commit is contained in:
Khoa Nguyen 2025-02-27 16:58:20 +07:00 committed by Benjamin Cabé
parent b9160aab15
commit d9032f03f2
8 changed files with 262 additions and 144 deletions
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5
doc/releases/migration-guide-4.2.rst
View File

@ -262,6 +262,11 @@ Flash
* The Flash HP Renesas RA write protect Kconfig symbol :kconfig:option:`CONFIG_FLASH_RA_WRITE_PROTECT`
has been renamed to :kconfig:option:`CONFIG_FLASH_RENESAS_RA_HP_WRITE_PROTECT`.
* Separate the file ``renesas,ra-nv-flash.yaml`` into 2 files ``renesas,ra-nv-code-flash.yaml``
and ``renesas,ra-nv-data-flash.yaml``.
* Separate the ``compatible`` from ``renesas,ra-nv-flash`` to :dtcompatible:`renesas,ra-nv-code-flash.yaml`
and :dtcompatible:`renesas,ra-nv-data-flash.yaml`.
Stepper
=======

6
drivers/flash/Kconfig.renesas_ra
View File

@ -25,4 +25,10 @@ config FLASH_RENESAS_RA_HP_WRITE_PROTECT
Enables flash extended operation to enable/disable flash write
protection from external devices
config FLASH_RENESAS_RA_HP_BGO
bool "Background operations feature"
default y
help
Enable Background operations (BGOs)
endif # SOC_FLASH_RENESAS_RA_HP

186
drivers/flash/soc_flash_renesas_ra_hp.c
View File

@ -19,33 +19,26 @@
LOG_MODULE_REGISTER(flash_renesas_ra_hp, CONFIG_FLASH_LOG_LEVEL);
#define ERASE_BLOCK_SIZE_0 DT_PROP(DT_INST(0, renesas_ra_nv_flash), erase_block_size)
#define ERASE_BLOCK_SIZE_1 DT_PROP(DT_INST(1, renesas_ra_nv_flash), erase_block_size)
BUILD_ASSERT((ERASE_BLOCK_SIZE_0 % FLASH_HP_CF_BLOCK_8KB_SIZE) == 0,
"erase-block-size expected to be a multiple of a block size");
BUILD_ASSERT((ERASE_BLOCK_SIZE_1 % FLASH_HP_DF_BLOCK_SIZE) == 0,
"erase-block-size expected to be a multiple of a block size");
/* Flags, set from Callback function */
static volatile struct event_flash g_event_flash = {
.erase_complete = false,
.write_complete = false,
};
static struct flash_pages_layout flash_ra_layout[5];
static struct flash_pages_layout code_flash_ra_layout[FLASH_HP_CF_LAYOUT_SIZE];
static struct flash_pages_layout data_flash_ra_layout[FLASH_HP_DF_LAYOUT_SIZE];
#if defined(CONFIG_FLASH_RENESAS_RA_HP_BGO)
void fcu_frdyi_isr(void);
void fcu_fiferr_isr(void);
void bgo_callback(flash_callback_args_t *p_args)
void flash_bgo_callback(flash_callback_args_t *p_args)
{
atomic_t *event_flag = (atomic_t *)(p_args->p_context);
if (FLASH_EVENT_ERASE_COMPLETE == p_args->event) {
g_event_flash.erase_complete = true;
atomic_or(event_flag, FLASH_FLAG_ERASE_COMPLETE);
} else if (FLASH_EVENT_WRITE_COMPLETE == p_args->event) {
atomic_or(event_flag, FLASH_FLAG_WRITE_COMPLETE);
} else {
g_event_flash.write_complete = true;
atomic_or(event_flag, FLASH_FLAG_GET_ERROR);
}
}
#endif /* CONFIG_FLASH_RENESAS_RA_HP_BGO */
static bool flash_ra_valid_range(struct flash_hp_ra_data *flash_data, off_t offset, size_t len)
{
@ -83,7 +76,7 @@ static int flash_ra_erase(const struct device *dev, off_t offset, size_t len)
static struct flash_pages_info page_info_off, page_info_len;
fsp_err_t err;
uint32_t block_num;
int rc, rc2;
int rc, rc2, ret = 0;
int key = 0;
bool is_contain_end_block = false;
@ -109,12 +102,12 @@ static int flash_ra_erase(const struct device *dev, off_t offset, size_t len)
if (flash_data->FlashRegion == CODE_FLASH) {
if ((offset + len) == (uint32_t)DT_REG_SIZE(DT_NODELABEL(flash0))) {
page_info_len.index = FLASH_HP_CF_BLOCK_32KB_LINEAR_END + 1;
page_info_len.index = FLASH_HP_CF_END_BLOCK;
is_contain_end_block = true;
}
} else {
if ((offset + len) == (uint32_t)DT_REG_SIZE(DT_NODELABEL(flash1))) {
page_info_len.index = FLASH_HP_DF_BLOCK_END;
if ((offset + len) == (uint32_t)FLASH_HP_DF_SIZE) {
page_info_len.index = FLASH_HP_DF_END_BLOCK;
is_contain_end_block = true;
}
}
@ -129,7 +122,7 @@ static int flash_ra_erase(const struct device *dev, off_t offset, size_t len)
}
}
block_num = (uint32_t)((page_info_len.index) - page_info_off.index);
block_num = (uint32_t)(page_info_len.index - page_info_off.index);
if (block_num > 0) {
if (flash_data->FlashRegion == CODE_FLASH) {
@ -143,24 +136,26 @@ static int flash_ra_erase(const struct device *dev, off_t offset, size_t len)
(long)(flash_data->area_address + offset), block_num);
if (err != FSP_SUCCESS) {
if (flash_data->FlashRegion == CODE_FLASH) {
irq_unlock(key);
} else {
k_sem_give(&dev_ctrl->ctrl_sem);
}
return -EIO;
ret = -EIO;
goto end;
}
#if defined(CONFIG_FLASH_RENESAS_RA_HP_BGO)
if (flash_data->FlashRegion == DATA_FLASH) {
/* Wait for the erase complete event flag, if BGO is SET */
if (true == dev_ctrl->fsp_config.data_flash_bgo) {
while (!g_event_flash.erase_complete) {
k_sleep(K_USEC(10));
while (!(dev_ctrl->flags & FLASH_FLAG_ERASE_COMPLETE)) {
if (dev_ctrl->flags & FLASH_FLAG_GET_ERROR) {
ret = -EIO;
atomic_and(&dev_ctrl->flags, ~FLASH_FLAG_GET_ERROR);
break;
}
g_event_flash.erase_complete = false;
k_sleep(K_USEC(10));
}
atomic_and(&dev_ctrl->flags, ~FLASH_FLAG_ERASE_COMPLETE);
}
#endif /* CONFIG_FLASH_RENESAS_RA_HP_BGO */
end:
if (flash_data->FlashRegion == CODE_FLASH) {
irq_unlock(key);
} else {
@ -168,7 +163,7 @@ static int flash_ra_erase(const struct device *dev, off_t offset, size_t len)
}
}
return 0;
return ret;
}
static int flash_ra_write(const struct device *dev, off_t offset, const void *data, size_t len)
@ -177,6 +172,7 @@ static int flash_ra_write(const struct device *dev, off_t offset, const void *da
struct flash_hp_ra_data *flash_data = dev->data;
struct flash_hp_ra_controller *dev_ctrl = flash_data->controller;
int key = 0;
int ret = 0;
if (!flash_ra_valid_range(flash_data, offset, len)) {
return -EINVAL;
@ -199,31 +195,33 @@ static int flash_ra_write(const struct device *dev, off_t offset, const void *da
(long)(offset + flash_data->area_address), len);
if (err != FSP_SUCCESS) {
if (flash_data->FlashRegion == CODE_FLASH) {
irq_unlock(key);
} else {
k_sem_give(&dev_ctrl->ctrl_sem);
}
return -EIO;
ret = -EIO;
goto end;
}
#if defined(CONFIG_FLASH_RENESAS_RA_HP_BGO)
if (flash_data->FlashRegion == DATA_FLASH) {
/* Wait for the write complete event flag, if BGO is SET */
if (true == dev_ctrl->fsp_config.data_flash_bgo) {
while (!g_event_flash.write_complete) {
k_sleep(K_USEC(10));
while (!(dev_ctrl->flags & FLASH_FLAG_WRITE_COMPLETE)) {
if (dev_ctrl->flags & FLASH_FLAG_GET_ERROR) {
ret = -EIO;
atomic_and(&dev_ctrl->flags, ~FLASH_FLAG_GET_ERROR);
break;
}
g_event_flash.write_complete = false;
k_sleep(K_USEC(10));
}
atomic_and(&dev_ctrl->flags, ~FLASH_FLAG_WRITE_COMPLETE);
}
#endif /* CONFIG_FLASH_RENESAS_RA_HP_BGO */
end:
if (flash_data->FlashRegion == CODE_FLASH) {
irq_unlock(key);
} else {
k_sem_give(&dev_ctrl->ctrl_sem);
}
return 0;
return ret;
}
static int flash_ra_get_size(const struct device *dev, uint64_t *size)
@ -241,25 +239,23 @@ void flash_ra_page_layout(const struct device *dev, const struct flash_pages_lay
struct flash_hp_ra_data *flash_data = dev->data;
if (flash_data->FlashRegion == DATA_FLASH) {
flash_ra_layout[0].pages_count = flash_data->area_size / FLASH_HP_DF_BLOCK_SIZE;
flash_ra_layout[0].pages_size = FLASH_HP_DF_BLOCK_SIZE;
*layout_size = 1;
data_flash_ra_layout[0].pages_count = FLASH_HP_DF_BLOCKS_COUNT;
data_flash_ra_layout[0].pages_size = FLASH_HP_DF_BLOCK_SIZE;
*layout = data_flash_ra_layout;
*layout_size = FLASH_HP_DF_LAYOUT_SIZE;
} else {
flash_ra_layout[0].pages_count =
(FLASH_HP_CF_BLOCK_8KB_LOW_END - FLASH_HP_CF_BLOCK_8KB_LOW_START) + 1;
flash_ra_layout[0].pages_size = FLASH_HP_CF_BLOCK_8KB_SIZE;
flash_ra_layout[1].pages_count =
(FLASH_HP_CF_BLOCK_32KB_LINEAR_END - FLASH_HP_CF_BLOCK_32KB_LINEAR_START) +
1;
flash_ra_layout[1].pages_size = FLASH_HP_CF_BLOCK_32KB_SIZE;
code_flash_ra_layout[0].pages_count = FLASH_HP_CF_REGION0_BLOCKS_COUNT;
code_flash_ra_layout[0].pages_size = FLASH_HP_CF_REGION0_BLOCK_SIZE;
#if (FLASH_HP_VERSION == 40)
code_flash_ra_layout[1].pages_count = FLASH_HP_CF_REGION1_BLOCKS_COUNT;
code_flash_ra_layout[1].pages_size = FLASH_HP_CF_REGION1_BLOCK_SIZE;
*layout_size = 2;
#endif /* FLASH_HP_VERSION == 40 */
*layout = code_flash_ra_layout;
*layout_size = FLASH_HP_CF_LAYOUT_SIZE;
}
*layout = flash_ra_layout;
}
#endif
#endif /* CONFIG_FLASH_PAGE_LAYOUT */
static const struct flash_parameters *flash_ra_get_parameters(const struct device *dev)
{
@ -270,13 +266,15 @@ static const struct flash_parameters *flash_ra_get_parameters(const struct devic
static struct flash_hp_ra_controller flash_hp_ra_controller = {
.fsp_config = {
.data_flash_bgo = true,
.p_callback = bgo_callback,
.data_flash_bgo = IS_ENABLED(CONFIG_FLASH_RENESAS_RA_HP_BGO),
#if defined(CONFIG_FLASH_RENESAS_RA_HP_BGO)
.p_callback = flash_bgo_callback,
.p_context = NULL,
.irq = (IRQn_Type)DT_INST_IRQ_BY_NAME(0, frdyi, irq),
.err_irq = (IRQn_Type)DT_INST_IRQ_BY_NAME(0, fiferr, irq),
.err_ipl = DT_INST_IRQ_BY_NAME(0, fiferr, priority),
.ipl = DT_INST_IRQ_BY_NAME(0, frdyi, priority),
#endif /* CONFIG_FLASH_RENESAS_RA_HP_BGO */
}};
#ifdef CONFIG_FLASH_EX_OP_ENABLED
@ -297,7 +295,7 @@ static int flash_ra_ex_op(const struct device *dev, uint16_t code, const uintptr
return err;
}
#endif
#endif /* CONFIG_FLASH_EX_OP_ENABLED */
static int flash_ra_init(const struct device *dev)
{
@ -308,7 +306,7 @@ static int flash_ra_init(const struct device *dev)
return -ENODEV;
}
if (flash_data->area_address == FLASH_HP_DF_START) {
if (flash_data->area_address == FLASH_HP_DF_START_ADDRESS) {
flash_data->FlashRegion = DATA_FLASH;
} else {
flash_data->FlashRegion = CODE_FLASH;
@ -319,33 +317,38 @@ static int flash_ra_init(const struct device *dev)
return 0;
}
static void flash_controller_ra_irq_config_func(const struct device *dev)
{
ARG_UNUSED(dev);
R_ICU->IELSR[DT_IRQ_BY_NAME(DT_DRV_INST(0), frdyi, irq)] =
BSP_PRV_IELS_ENUM(EVENT_FCU_FRDYI);
R_ICU->IELSR[DT_IRQ_BY_NAME(DT_DRV_INST(0), fiferr, irq)] =
BSP_PRV_IELS_ENUM(EVENT_FCU_FIFERR);
IRQ_CONNECT(DT_IRQ_BY_NAME(DT_DRV_INST(0), frdyi, irq),
DT_IRQ_BY_NAME(DT_DRV_INST(0), frdyi, priority), fcu_frdyi_isr,
DEVICE_DT_INST_GET(0), 0);
IRQ_CONNECT(DT_IRQ_BY_NAME(DT_DRV_INST(0), fiferr, irq),
DT_IRQ_BY_NAME(DT_DRV_INST(0), fiferr, priority), fcu_fiferr_isr,
DEVICE_DT_INST_GET(0), 0);
irq_enable(DT_INST_IRQ_BY_NAME(0, frdyi, irq));
irq_enable(DT_INST_IRQ_BY_NAME(0, fiferr, irq));
}
#if defined(CONFIG_FLASH_RENESAS_RA_HP_BGO)
#define FLASH_CONTROLLER_RA_IRQ_INIT \
{ \
R_ICU->IELSR[DT_IRQ_BY_NAME(DT_DRV_INST(0), frdyi, irq)] = \
BSP_PRV_IELS_ENUM(EVENT_FCU_FRDYI); \
R_ICU->IELSR[DT_IRQ_BY_NAME(DT_DRV_INST(0), fiferr, irq)] = \
BSP_PRV_IELS_ENUM(EVENT_FCU_FIFERR); \
\
IRQ_CONNECT(DT_IRQ_BY_NAME(DT_DRV_INST(0), frdyi, irq), \
DT_IRQ_BY_NAME(DT_DRV_INST(0), frdyi, priority), fcu_frdyi_isr, \
DEVICE_DT_INST_GET(0), 0); \
IRQ_CONNECT(DT_IRQ_BY_NAME(DT_DRV_INST(0), fiferr, irq), \
DT_IRQ_BY_NAME(DT_DRV_INST(0), fiferr, priority), fcu_fiferr_isr, \
DEVICE_DT_INST_GET(0), 0); \
\
irq_enable(DT_INST_IRQ_BY_NAME(0, frdyi, irq)); \
irq_enable(DT_INST_IRQ_BY_NAME(0, fiferr, irq)); \
}
#endif /* CONFIG_FLASH_RENESAS_RA_HP_BGO */
static int flash_controller_ra_init(const struct device *dev)
{
fsp_err_t err;
const struct flash_hp_ra_controller_config *cfg = dev->config;
struct flash_hp_ra_controller *data = dev->data;
cfg->irq_config(dev);
#if defined(CONFIG_FLASH_RENESAS_RA_HP_BGO)
FLASH_CONTROLLER_RA_IRQ_INIT
#endif /* CONFIG_FLASH_RENESAS_RA_HP_BGO */
k_sem_init(&data->ctrl_sem, 1, 1);
data->fsp_config.p_context = &data->flags;
err = R_FLASH_HP_Open(&data->flash_ctrl, &data->fsp_config);
@ -354,15 +357,9 @@ static int flash_controller_ra_init(const struct device *dev)
return -EIO;
}
k_sem_init(&data->ctrl_sem, 1, 1);
return 0;
}
static struct flash_hp_ra_controller_config flash_hp_ra_controller_config = {
.irq_config = flash_controller_ra_irq_config_func,
};
static DEVICE_API(flash, flash_ra_api) = {
.erase = flash_ra_erase,
.write = flash_ra_write,
@ -382,8 +379,7 @@ static DEVICE_API(flash, flash_ra_api) = {
.area_size = DT_REG_SIZE(index)}; \
static struct flash_hp_ra_config flash_hp_ra_config_##index = { \
.flash_ra_parameters = { \
.write_block_size = GET_SIZE( \
(CHECK_EQ(DT_REG_ADDR(index), FLASH_HP_DF_START)), 4, 128), \
.write_block_size = DT_PROP(index, write_block_size), \
.erase_value = 0xff, \
}}; \
\
@ -394,5 +390,5 @@ static DEVICE_API(flash, flash_ra_api) = {
DT_FOREACH_CHILD_STATUS_OKAY(DT_DRV_INST(0), RA_FLASH_INIT);
/* define the flash controller device just to run the init. */
DEVICE_DT_DEFINE(DT_DRV_INST(0), flash_controller_ra_init, NULL, &flash_hp_ra_controller,
&flash_hp_ra_controller_config, PRE_KERNEL_1, CONFIG_FLASH_INIT_PRIORITY, NULL);
DEVICE_DT_DEFINE(DT_DRV_INST(0), flash_controller_ra_init, NULL, &flash_hp_ra_controller, NULL,
PRE_KERNEL_1, CONFIG_FLASH_INIT_PRIORITY, NULL);

81
drivers/flash/soc_flash_renesas_ra_hp.h
View File

@ -8,27 +8,66 @@
#define ZEPHYR_DRIVERS_FLASH_SOC_FLASH_RENESAS_RA_HP_H_
#include <zephyr/drivers/flash.h>
#include <zephyr/sys/atomic.h>
#include <instances/r_flash_hp.h>
#include <api/r_flash_api.h>
#include <zephyr/drivers/flash/ra_flash_api_extensions.h>
#define CHECK_EQ(val1, val2) ((val1) == (val2) ? 1 : 0)
#define GET_SIZE(COND, value, default_value) ((COND) ? (value) : (default_value))
#define FLASH_HP_CF_START_ADDRESS DT_REG_ADDR(DT_NODELABEL(flash0))
#define FLASH_HP_DF_START_ADDRESS DT_REG_ADDR(DT_NODELABEL(flash1))
#define FLASH_HP_CF_BLOCK_8KB_SIZE BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE
#define FLASH_HP_CF_BLOCK_32KB_SIZE BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE
#define FLASH_HP_DF_BLOCK_SIZE BSP_FEATURE_FLASH_HP_DF_BLOCK_SIZE
#define FLASH_HP_DF_START BSP_FEATURE_FLASH_DATA_FLASH_START
#define FLASH_HP_CF_SIZE DT_REG_SIZE(DT_NODELABEL(flash0))
#define FLASH_HP_DF_SIZE DT_REG_SIZE(DT_NODELABEL(flash1))
#define FLASH_HP_CF_BLOCK_8KB_LOW_START (0)
#define FLASH_HP_CF_BLOCK_8KB_LOW_END (7)
#define FLASH_HP_CF_BLOCK_8KB_HIGH_START (70)
#define FLASH_HP_CF_BLOCK_8KB_HIGH_END (77)
#define FLASH_HP_VERSION DT_PROP(DT_PARENT(DT_NODELABEL(flash0)), flash_hardware_version)
#define FLASH_HP_CF_BLOCK_32KB_LINEAR_START (8)
#define FLASH_HP_CF_BLOCK_32KB_LINEAR_END (DT_PROP(DT_NODELABEL(flash), block_32kb_linear_end))
#if (FLASH_HP_VERSION == 40)
#define FLASH_HP_DF_BLOCK_END (DT_REG_SIZE(DT_NODELABEL(flash1)) / FLASH_HP_DF_BLOCK_SIZE)
#define FLASH_HP_CF_REGION0_BLOCKS_COUNT \
DT_PHA_BY_IDX(DT_NODELABEL(flash0), erase_blocks, 0, pages_count)
#define FLASH_HP_CF_REGION0_BLOCK_SIZE \
DT_PHA_BY_IDX(DT_NODELABEL(flash0), erase_blocks, 0, pages_size)
#define FLASH_HP_CF_REGION0_SIZE (FLASH_HP_CF_REGION0_BLOCKS_COUNT * FLASH_HP_CF_REGION0_BLOCK_SIZE)
BUILD_ASSERT(FLASH_HP_CF_REGION0_BLOCK_SIZE == BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE,
"erase-block-size expected to be equal with block size");
#define FLASH_HP_CF_REGION1_BLOCKS_COUNT \
DT_PHA_BY_IDX(DT_NODELABEL(flash0), erase_blocks, 1, pages_count)
#define FLASH_HP_CF_REGION1_BLOCK_SIZE \
DT_PHA_BY_IDX(DT_NODELABEL(flash0), erase_blocks, 1, pages_size)
BUILD_ASSERT(FLASH_HP_CF_REGION1_BLOCK_SIZE == BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE,
"erase-block-size expected to be equal with block size");
#define FLASH_HP_CF_LAYOUT_SIZE (2UL)
#define FLASH_HP_CF_END_BLOCK (FLASH_HP_CF_REGION0_BLOCKS_COUNT + FLASH_HP_CF_REGION1_BLOCKS_COUNT)
#elif (FLASH_HP_VERSION == 4)
#define FLASH_HP_CF_REGION0_BLOCKS_COUNT \
DT_PHA_BY_IDX(DT_NODELABEL(flash0), erase_blocks, 0, pages_count)
#define FLASH_HP_CF_REGION0_BLOCK_SIZE \
DT_PHA_BY_IDX(DT_NODELABEL(flash0), erase_blocks, 0, pages_size)
#define FLASH_HP_CF_REGION0_SIZE (FLASH_HP_CF_REGION0_BLOCKS_COUNT * FLASH_HP_CF_REGION0_BLOCK_SIZE)
BUILD_ASSERT(FLASH_HP_CF_REGION0_BLOCK_SIZE == BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE,
"erase-block-size expected to be equal with block size");
#define FLASH_HP_CF_LAYOUT_SIZE (1UL)
#define FLASH_HP_CF_END_BLOCK FLASH_HP_CF_REGION0_BLOCKS_COUNT
#endif
#define FLASH_HP_DF_LAYOUT_SIZE (1UL)
#define FLASH_HP_DF_BLOCK_SIZE DT_PROP(DT_NODELABEL(flash1), erase_block_size)
#define FLASH_HP_DF_BLOCKS_COUNT (FLASH_HP_DF_SIZE / FLASH_HP_DF_BLOCK_SIZE)
#define FLASH_HP_DF_END_BLOCK FLASH_HP_DF_BLOCKS_COUNT
BUILD_ASSERT(FLASH_HP_DF_BLOCK_SIZE == BSP_FEATURE_FLASH_HP_DF_BLOCK_SIZE,
"erase-block-size expected to be equal with block size");
#if defined(CONFIG_FLASH_EX_OP_ENABLED)
#define FLASH_HP_FCU_CONFIG_SET_BPS (0x1300A1C0U)
@ -47,16 +86,17 @@ enum flash_region {
DATA_FLASH,
};
typedef void (*irq_config_func_t)(const struct device *dev);
#if defined(CONFIG_FLASH_RENESAS_RA_HP_BGO)
#define FLASH_FLAG_ERASE_COMPLETE BIT(0)
#define FLASH_FLAG_WRITE_COMPLETE BIT(1)
#define FLASH_FLAG_GET_ERROR BIT(2)
#endif /* CONFIG_FLASH_RENESAS_RA_HP_BGO */
struct flash_hp_ra_controller {
struct st_flash_hp_instance_ctrl flash_ctrl;
struct k_sem ctrl_sem;
struct st_flash_cfg fsp_config;
};
struct flash_hp_ra_controller_config {
irq_config_func_t irq_config;
atomic_t flags;
};
struct flash_hp_ra_data {
@ -70,11 +110,6 @@ struct flash_hp_ra_config {
struct flash_parameters flash_ra_parameters;
};
struct event_flash {
volatile bool erase_complete;
volatile bool write_complete;
};
#if defined(CONFIG_FLASH_RENESAS_RA_HP_WRITE_PROTECT)
int flash_ra_ex_op_write_protect(const struct device *dev, const uintptr_t in, void *out);
#endif /* CONFIG_FLASH_RENESAS_RA_HP_WRITE_PROTECT */

38
dts/bindings/flash_controller/renesas,ra-flash-hp-controller.yaml
View File

@ -1,4 +1,4 @@
# Copyright (c) 2024 Renesas Electronics Corporation
# Copyright (c) 2024-2025 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0
description: Renesas RA family flash high-performance controller
@ -8,19 +8,33 @@ compatible: "renesas,ra-flash-hp-controller"
include: flash-controller.yaml
properties:
block-32kb-linear-end:
interrupts:
description: |
IRQ number and priority to use for Flash controller.
Note: If the config FLASH_RENESAS_RA_HP_BGO is not set,
no need to define interrupt for flash controller.
interrupt-names:
enum:
- "frdyi"
- "fiferr"
description: |
Interrupts must be given corresponding names so that the driver can recognize them.
flash-hardware-version:
type: int
required: true
description: The final 32kb block index of the code-flash in the linear mode.
enum:
- 4
- 40
description: |
Version of the Flash peripheral/hardware.
block-32kb-dual-low-end:
"#erase-block-cells":
type: int
description: The final 32kb block index of the code-flash's lower Bank in the dual mode
const: 2
description: Number of items to expect in a flash layout.
block-32kb-dual-high-end:
type: int
description: The final 32kb block index of the code-flash's higher Bank in the dual mode
reserved-area-num:
type: int
description: The number of the code-flash's reserved blocks in the dual mode
erase-block-cells:
- pages_count
- pages_size

61
dts/bindings/mtd/renesas,ra-nv-code-flash.yaml Normal file
View File

@ -0,0 +1,61 @@
# Copyright (c) 2024-2025 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0
description: |
Flash memory binding for Renesas RA Code flash region
include: [base.yaml, soc-nv-flash.yaml]
compatible: "renesas,ra-nv-code-flash"
properties:
programming-enable:
type: boolean
description: Enable code flash programming configuration
erase-block-size:
type: int
description: |
The flash controller is limited by hardware to erase whole blocks of flash
at a time. This property describes the largest erase block size in erase-blocks.
erase-blocks:
type: phandle-array
description: |
The flash controller is limited by hardware to erase whole blocks of flash
at a time. This property describes the layout of the erase-blocks, which can
vary in size within the flash memory area.
Currently, Renesas SoCs use different versions of code-flash. While most code-flash
defines `erase-block-size` as one block, some versions have blocks with different sizes
and divided into regions. Therefore, this property reflects the actual `erase-block-size`
for each region of code-flash, depending on the flash version.
For example:
- The R7FA8M1AHECBD's code-flash has `flash-hardware-version = <40>` and uses
the following blocks layout:
|--------------------|
| 8 Kbytes |
|--------------------| number of 8kb blocks = 8
| 8 Kbytes |
|--------------------|
| 32 Kbytes |
|--------------------|
| 32 Kbytes | number of 32kb blocks = 61
|--------------------|
| 32 Kbytes |
|--------------------|
The "erase-block" should has the value like this:
erase-blocks = <&flash 8 8192>, <&flash 61 32768>;
- The R7FA4L1BD4CFP's code-flash has `flash-hardware-version = <4>` and uses
the following blocks layout:
|--------------------|
| 2 Kbytes |
|--------------------|
| 2 Kbytes | number of 2kb blocks = 256
|--------------------|
| 2 Kbytes |
|--------------------|
The "erase-block" should has the value like this:
erase-blocks = <&flash 256 2048>;

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dts/bindings/mtd/renesas,ra-nv-data-flash.yaml Normal file
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# Copyright (c) 2024-2025 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0
description: |
Flash memory binding for Renesas RA Data flash region
include: [base.yaml, soc-nv-flash.yaml]
compatible: "renesas,ra-nv-data-flash"
properties:
programming-enable:
type: boolean
description: |
Enable data flash programming configuration

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dts/bindings/mtd/renesas,ra-nv-flash.yaml
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# Copyright (c) 2024 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0
description: |
Flash memory binding of Renesas RA family
include: [base.yaml, soc-nv-flash.yaml]
compatible: "renesas,ra-nv-flash"
properties:
renesas,programming-enable:
type: boolean
description: Enable flash programming configuration