Previously, the CMSDK APB dual timer driver hardcoded the counter
clock frequency to 24 MHz, which limits reuse across SoCs and
boards with different timer clock sources.
This patch replaces the hardcoded frequency with a value derived
from the device tree's `clocks` phandle, using the
`clock-frequency` property of the referenced clock controller node.
If the property is missing, it falls back to a default 24 MHz.
Signed-off-by: Lidor T <lidor@exibit-iot.com>
Allow for users to define the sampling period via the sampleper
register on a per instance basis through device-tree properties.
The previous value was hard coded. The same value is now the default
value.
Signed-off-by: Mark Geiger <MarkGeiger@posteo.de>
In lis2dux12_freq_to_odr_val, the loop through the array of possible ODR
frequencies can break sooner than expected if power-mode is
set to High Performance mode and the requested ODR is less than or
equal to 25Hz.
Moreover, move the "odr |= 0x10" statement used for HP mode in the
chip_api set_odr_raw() API, so that we enter the HP mode even when the
ODR is set from DT only.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This change introduces GPIO_RX_PORT_IRQ_DECL() and GPIO_RX_PORT_IRQ_ELEM()
macros to conditionally generate GPIO port IRQ declarations and elements
only when the 'port_irq_names' property exists in the device tree node.
This improves code clarity and avoids generating unused code for ports
that do not have IRQ support for Renesas RX
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
We want to simplify the maintenance burden and confusion of having
more than one driver for the same kernel timer peripheral used on
all Microchip MEC parts. The XEC version of the driver was converted
register definitions in the driver. Register access is performed using
Zephyr sys_read/write architecture specific inline routines. Driver DT
YAML was updated to use phandle for the 32-bit basic timer used for
ARCH_HAS_CUSTOM_BUSY_WAIT support, basic timer max value property,
and GIRQ interrtup aggregator hardware information.
SoC part Kconfigs, chip level/board level DTSI updated to use the
unified driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This driver supports multi-color LEDs built with several monochromatic
LEDs. ->set_color is the only LED driver API method implemented.
Instead of calling led_set_brightness() for each monochromatic LED,
led_set_color() can be called on the leds-group-multicolor device to
set all colors at once.
See the leds-group-multicolor DT binding for details.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
For all LED drivers, the underlying subsystem is automatically selected
in Kconfig if their compatible node is found in DT.
The only exception is the PWM LED driver which depends on PWM instead
of selecting it. The PWM Kconfig option must be explicitely selected in
order to have LED_PWM enabled.
This patch updates the Kconfig of the PWM LED driver to have the same
behavior as other LED drivers: PWM is now automatically selected if a
"pwm-leds" compatible node is found in DT.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Add support to generate the random MAC if 'zephyr,random-mac-address'
is set,uses 'local-mac-address' from DT if available, or falls back
to a default Xilinx OUI-based MAC with zeroed bytes
Signed-off-by: Venkatesh Odela <venkatesh.odela@amd.com>
Automatically hide the nRF7x interface from the connection manager if
the TX path is disabled (scan only mode). This prevents function calls
like `conn_mgr_all_if_up(true)` from bringing up the interface which
can never result in a connection.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Restructured counter and timer.
CTimer/Timer is now parent to pwm and counter.
Created PWM driver and tied to pwm and pwm-led
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
This moves the couple functions that are and will be all over
the various clock operations for all platforms.
Signed-off-by: Camille BAUD <mail@massdriver.space>
Handle `SENSOR_CHAN_ALL` case of the sample_fetch callback of the
lis2dw12 driver. Without this, `sensor_sample_fetch()` does not work
correctly for this device, e.g. rendering the rtio and the sensor shell
unusable.
Signed-off-by: Ruben Völl <ruben.voell@sevenlab.de>
Rpu recovey debug stats are stored in hal_dev_ctx which is not
persistent in case of interface is brought down/up. Need to add
in nrf_wifi_ctx_zep and update before interface goes down.
Signed-off-by: Kapil Bhatt <kapil.bhatt@nordicsemi.no>
The MAX17055 peripheral allows measuring the current
value (which corresponds to the instantaneous value). Respond to
the `SENSOR_CHAN_CURRENT` command, and retrieve the data
from the `0x0a` device register.
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
In order to allow decoupling these two operations.
No functional changes, sensor returns same readings through shell.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
As this isn't effectively providing any value to the driver, instead
wastes cycles on every sample-fetch. Scrubbing this simplifies the
code.
Also, remove fix_sign() and replace it for the in-tree helper
sign_extend().
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Some modems (e.g. Quectel BG95/EG25-G, several SIMCom parts) print
“APP RDY” when the application core is ready. Parse this line and
proceed from AWAIT_POWER_ON immediately, while keeping the existing
startup timeout as a fall-back.
* add MODEM_CELLULAR_EVENT_MODEM_READY + chat match
* open UART and attach chat in AWAIT_POWER_ON
* jump to SET_BAUDRATE / RUN_INIT_SCRIPT on event
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
Add optional autostarts boolean to the quectel,bg95 binding and make
MODEM_CELLULAR_DEFINE_INSTANCE() use it through DT_PROP_OR().
Boards that carry a BG95-M3 Mini-PCIe card—or any other variant that
boots at VCC can now declare the property and skip the PWRKEY pulse,
while existing designs continue to behave unchanged.
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
Quectel BG9x returns only the base model string to AT+CGMR, while
AT+QGMR provides the true firmware build ID, e.g.
AT+CGMR → BG95M3LAR02A03
AT+QGMR → BG95M3LAR02A03_01.204.01.204
Replace CGMR with QGMR in the BG95 init script so that
cellular_get_modem_info(... FW_VERSION ...) reports the complete
version string.
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
Add quectel_bg95_shutdown_chat_script that issues AT+QPOWD=1 and
link it to MODEM_CELLULAR_DEVICE_QUECTEL_BG95 to enable a clean
software-initiated power-off path
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
This commit adds support for configuring two user-defined target
addresses in the I2C target driver.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
GAIN field is not present on LV10A, so instead we need to
check the input value to the function.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
The nrf-802154 driver may be unable to acquire a valid timestamp under
rare conditions. In such case, the nrf_802154_received_timestamp_raw
reports time=NRF_802154_NO_TIMESTAMP.
The shim implementation must not calculate the PHR timestamp when
receiving this value, because doing so results in an assert in
ptp_packet.h due to a negative time value.
When the driver is unable to capture the timestamp, the packet is
assigned zero as its timestamp.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
It was observed that device ceases to work in Buffer DMA mode after GET
DEVICE QUALIFIER request is STALLed (when USB stack is limited to
Full-Speed only operation). The issue is due to missing dout feed.
Clear pending dout feed flag after bus reset (enumeration done) and
after stalled control read transfer to allow dout to be feed when
necessary.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The can_nrf device driver incorrectly passes its own device
driver pointer to a call to clock_control_get_rate() to get the
rate of the auxpll. The actual device driver which should be passed
to clock_control_get_rate() is the auxpll.
Without this fix, the call jumps to the can_nrf_api and returns
garbage (unfortunately it does not hardfault, which is why this
issue has not been discovered yet).
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
In order to abstract details of the transport itself, improving
portability.
No functional changes at this point. Driver works the same as far
as my local testing goes.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
The existing driver requires setting multiple attributes in order to
work basic fetch/get reads. Simplify this by allowing the user to set
dts node properties based on the use-case.
As a result, basic settings results in the driver being up and running
from the start, one can just get sensor readings out of the box.
These still can be overriden at run-time if need be.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Turn MCX series into families.
Reasoning:
1. The MCX SOCs are quite different from each other and having them all
under one family in the HWMv2 hierarchy is fruitless because there
are so many differences that it is confusing to try to introduce
family-level code and configs since they would each only apply to a
subset of the series. There is almost nothing that can be shared
between all of them. Which is why there are comments in the MCX
family files saying not to put anything in them. This is a technical
waste.
2. Therefore, turning all of them into families is almost 0 effort and
makes sense. It will allow these different types of MCX to be
further subdivided into series in the future as the MCX portfolio
expands and such division will be necessary as new SOCs within each
letter family are released.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Ensure uart_configure() only updates UART parameters without
reassigning pin configuration. Pin assignment via pinctrl is now
restricted to the initialization procedure, guaranteeing pins are
set only when properly configured.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>