Use devicetree instead of Kconfig to configure the board control
switches in nRF9160 DK:
- add binding for the switches that provide optional signal routings
on this board
- add binding for the GPIO interface that can be used for communication
(e.g. UART based) between the nRF9160 and the nRF52840 on the DK,
and add GPIO mapping for this interface so that its lines can be used
without caring about of actual pin numbers on both sides
- add binding for one GPIO line chosen from the above interface that is
to allow the nRF9160 to reset the nRF52840
- update accordingly dts files and board specific code for both board
definitions associated with the DK
- introduce .dtsi files that can be included from dts overlays in order
to facilitate the use of the above GPIO interface; modify the overlay
in the hci_uart sample to provide an example of use of those files
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This adds a new qemu_x86_virt board where code and data are
mapped in virtual address space and is actually executing within
virtual address space.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Force the Arduino Due device to preform a reset after loading
the program using JLink, effectively allowing the program to
run after west flash.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Commit 821c03a14a ("i2c: nordic: switch
to phandle arrays for pinmux") deprecated some Nordic devicetree
properties.
When boards get merged with stale CI results (i.e. if CI results are
from a mainline commit earlier than 821c03a1), we will get deprecation
warnings, which twister treats as errors.
Play whack-a-mole with the ones that are in tree.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Enable the null-pointer dereferencing detection by default
throughout the test-suite. Explicitly disable this for the
gen_isr_table test which needs to perform vector table reads.
Disable null-pointer exception detection on qemu_cortex_m3
board, as DWT it is not emulated by QEMU on this platform.
Additionally, disable null-pointer exception detection on
mps2_an521 (QEMU target), as DWT is not present and the MPU
based solution won't work, since the target does not have
the area 0x0 - 0x400 mapped, but the QEMU still permits
read access.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Convert driver and users of pinmux on mcux lpc platforms to getting
basic port info from devicetree (register address, label)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the BOARD.dts files for Nordic-based boards to use the new I2C
devicetree properties for specifying the SDA and SCL pins.
This was done with a script.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Convert ism330dhcx INT_PIN attribute from Kconfigs to Device
Tree binding properties. Here int-pin has been defined as
enum with two possible values: 1 and 2.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add i2s as a supported feature on at least one board for each driver
that we have in tree to get CI coverage.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If CONFIG_I2C=n is set we get a build warning:
pinmux.c:35:13: error: 'i2c_pinmux' defined but not used
Fix this by adding ifdef protection around i2c_pinmux.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
CONFIG_SPI_0 and CONFIG_SPI_0_OP_MODES aren't relevant for the
XEC QMSPI driver so remove setting them.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add quadspi node in stm32f7.dtsi and quadspi support to boards
stm32f746g_disco and stm32f769i_disco.
Note! Does not support DMA.
Signed-off-by: Helge Juul <helge@fastmail.com>
Add pwm to board yaml as supported peripherals on the bbc_microbit.
This is needed as the servo_motor sample requires it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The board's main I2C bus controller doesn't have a compatible set, so
it's not detected as an I2C bus at all.
This breaks the build when trying to build the samples/sensor/lis2dh
application with the lis2dh sensor on that bus.
Fixes: #32420
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
In NPCX7 series, it contains two tachometer (TACH) modules that contains
two Independent timers (counter 1 and 2). They are used to capture a
counter value when an event is detected via the external pads (TA or
TB).
The CL also includes:
— Add npcx tachometer device tree declarations.
— Zephyr sensor api implementation for tachometer.
— Enable "tach1" device in npcx7m6fb.dts for testing.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This changes x86 to use CONFIG_SRAM_OFFSET instead of
arch-specific CONFIG_X86_KERNEL_OFFSET. This allows the common
MMU macro Z_BOOT_VIRT_TO_PHYS() and Z_BOOT_PHYS_TO_VIRT() to
function properly if we ever need to map the kernel into
virtual address space that does not have the same starting
physical address.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Place the new signing code in the TFM module CMakeLists.txt.
Make some small tweaks and add a sentence to the docs.
In the process, make a few changes to the signing code:
- Change some names of files created.
- Minimize the number of files created.
- Use hex files instead of bin files. This is so we don't need to know
the offset when creating hex files from bin files.
Also add signing for MCUBOOT_IMAGE_NUMBER=1 based on the code from the
v2m_musca_b1 board, though, this board does not build with =1 now
because of (I assume) some flash aliasing which places the S and NS
images 0x10000000 apart, where the manual algorithm places them next to
each other. It builds with =2, though.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
This CL introduces power management driver that improves the efficiency
of ec operation by adjusting the chip’s power consumption to the level
of activity required by the application in npcx series.
The following list summarizes the main properties of the various chip
power states. Please refer the power.c file for more detail.
Main power states in npcx series include:
- Active: Core, RAM and modules operate at the clocks generated by PLL.
- Idle: Enter this state when the Core executes WFI or WFE instruction.
- Sleep: clock is stopped for most of modules but PLL is enabled.
- Deep Sleep: As Sleep mode but PLL is disabled.
- Standby: All power rails are turned off besides standby and battery
power rails.
And this CL implements one power state, PM_STATE_SUSPEND_TO_IDLE, with
two sub-states for Zephyr power management system.
Sub-state 0 - "Deep Sleep" mode with “Instant” wake-up if residency
time is greater or equal to 1 ms
Sub-state 1 - "Deep Sleep" mode with "Standard" wake-up if residency
time is greater or equal to 201 ms
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces a kernel device driver implemented by the internal
64/32-bit timers in Nuvoton NPCX series. Via these two kinds of timer,
the driver provides an standard "system clock driver" interface.
It includes:
- A system timer based on an ITIM64 (Internal 64-bit timer) instance,
clocked by APB2 which freq is CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC.
- Its prescaler is set to 1 and provide the kernel cycles reading
without handling overflow mechanism.
- A event timer based on an ITIM32 (Internal 32-bit timer) instance,
clocked by LCLK which frequency is 32KHz and still activated when ec
entered "idle/deep idle" power state for better power consumption.
- Its prescaler is set to 1 and provide timeout event mechansim.
- Compensate system timer which clock is gating for better power
consumption after ec left"idle/deep idle" power state.
This CL passed starve, timer_api, and timer_monotonic test suites.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
When proper target device is specified, instead of generic
Cortex-M33, JLinkGDBServer is able to flash the device on "load"
command.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Do not attempt to build/run all tests. Emulation platforms should
primarily build kernel and architecture related tests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Quoting from the QEMU manual "MTTCG is not compatible with -icount and
enabling icount will force a single threaded run.". Given that for
Cortex-A53 we haven't seen any particular problem when disabling icount
try to disable it.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This driver emulates a EEPROM device in flash.
Reworked implementation with modified flash layout.
The emulation represents the EEPROM in flash as a region that is a
direct map of the eeprom data followed by a region where changes to
the eeprom data is stored. Changes are written as address-data
combinations. The size of such a combination is determined by the
flash write block size and the size of the eeprom (required address
space), with a minimum of 4 byte.
The eeprom page needs to be a multiple of the flash page. Multiple
eeprom pages is also so supported and increases the number of writes
that can be performed.
The eeprom size, pagesize and the flash partition used for the eeprom
are defined in the dts. The flash partition should allow at least two
eeprom pages. For fast read access a rambuffer can be enabled for the
eeprom (by setting the option rambuf in the dts).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
CLOCK_STM32_PLL_XTPRE Kconfig symbol default value is n.
Then there is no need to explicitly set it to 'n' in stm32f1 boards
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The first uart instance was already devicetree based. To be consistent
convert the second instance to also be devicetree based.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The choice allowed for using TFM's own default. We now need full
knowledge over whether BL2 is enabled or not (e.g. to do signing),
so remove this option and simplify to a bool.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
Add the missing pieces to enable XIP for AArch64. Try to simulate the
XIP using QEMU using the '-bios' parameter.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
All x86 QEMU boards have a hard-coded memory size of 9MB which
does not corresponding with what is defined in device tree.
So make use of CONFIG_SRAM_SIZE to provide correct memory size.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
QEMU provides multiboot information by default so we can
use the provided memory map to mark reserved physical
memory. Note that 64-bit requires Multiboot2 which
currently both Zephyr and QEMU do not support, hence
it's not enabled for qemu_x86_64.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The default KERNEL_VM_SIZE if ACPI=y is too large for QEMU targets
which results in page tables being too big to fit in available
memory. So limit the VM size to a more reasonable one.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Provide the arduino_i2c node name from i2c_0.
Provide pinmux for frdm_stbc_agm01.
The frdm_stbc_agm01 supplies access to an FXOS8700 and FXAS21002.
when using frdm_stbc_agm01 with frdm_k22f, the FXAS21002 sample
sensor project can be utilized and the FXOS8700 sample sensor
project utilizes the shield's FXOS8700.
Signed-off-by: Ryan Holleran <rhollerar@gmail.com>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Even though possible to use external pull-up and open drain buffer,
prefer internal pull-up to reduce power consumption.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This commit moves TFM CMakeLists.txt into Zephyr and relocates the
Kconfig.tfm file under the modules/tfm folder.
Updates the manifest to point to related TFM changes.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Remove support for the Musca-A board. This board is rarely used, few
are available and superceded by Musca-B and Musca-S.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a simple pinctrl node for the IOF registers under the GPIO
controller node to be used by the pinmux driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
With addition of icount support ARC QEMU is now stable,
so we can finally enable it as default test platform.
This reverts commit 7d10b68baa.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
This CL moves def_lvol_io_list device-tree node from npcx7m6fb_evb.dts
to npcx7m6fb.dtsi. The benefit of it is that we needn't add
def_lvol_io_list node for each board dts file if there are no 1.8V
io-pads on the platform. If so, add them in the specific board dts file
directly.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
- Updated arduino dtsi to map spi1 as arduino spi
- Made board's zephyr peripheral mapping more compact and added arduino
and st-link labels.
Signed-off-by: Nikos Oikonomou <nikoikonomou92@gmail.com>
Set the Zephyr Vendor Specific HCI extensions as default y on nRF boards
that only support host only builds.
Correct this for nrf5340dk which had set the Kconfig for the feature
support instead of the feature itself.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
nRF5340 PDK board was deprecated in v2.5.0 release
and is removed now from the tree.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Stm32f7 disco boards benefit from dedicated openocd board target.
Use these target as the generic stm32f7discovery one will be
eventually removed.
Additionally, replace now deprecated 'adapter_khz' by 'adapter speed'.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Zephyr testcases(not SOF case) not use kernel DSP driver to load image
on ADSP board, thus do not need signing with xman. So add a input
'--no-manifest' to specify signing without xman in image. If use DSP
driver load image, we should not specify this.
Signed-off-by: Jian Kang <jianx.kang@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When load firmware by script, the buffer size and data size are not
same, so specify size when copy data to buffer.
Signed-off-by: Jian Kang <jianx.kang@intel.com>
All of these boards can be debugged with west debug via settings in
board.cmake, but the docs say they can't be. This is being copy/pasted
around; fix it.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The default frequency for this board in Renode is 66 MHz. This needs to
be even with `SYS_CLOCK_HW_CYCLES_PER_SEC` to avoid such problems as in
the #31726 issue.
Unfortunately, the difference in these values was helpful for some tests
that are failing with 66 MHz set in both places. It created artificial
boost in certain circumstances.
The frequencies in the default Renode platform description (`.repl`)
file for MI-V were overridden with 4 MHz value that seems to be better
tolerated based on testing. The `SYS_CLOCK_HW_CYCLES_PER_SEC` was
adjusted as well.
To solve the rest of the issues, `cpu PerformanceInMips` was set to 4.
It seems tests are completed faster with such a value.
This commit fixes#31726.
Signed-off-by: Adam Jeliński <ajelinski@antmicro.com>
Increase the size of ram/flash given in nrf5340dk_nrf5340_cpuapp.yaml
so they match the actual numbers which are available for default
tests and samples.
Signed-off-by: Maciej Perkowski <Maciej.Perkowski@nordicsemi.no>
A number of SoCs have overlapping devices at the same unit address.
Surpress the warning for those cases:
* NRF - kmu@39000 & flash-controller@39000
* NRF - clock@5000 & power@5000
* NRF - image@20000000 & image_s@20000000
* NRF - i2c@40003000 & spi@40003000
* STM - i2s@40003800 & spi@40003800
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A number of SoCs have overlapping devices at the same unit address.
Surpress the warning for those cases:
* Atmel - pinmux@41004400 & gpio@41004400
* Atmel - pinmux@41004480 & gpio@41004480
* Atmel - pinmux@41008000 & gpio@41008000
* NXP - flash@0 & gpio@0
* NXP - syscon@0 & gpio@0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On Atmel & Silabs SoCs the SPI controller is implemented on a shared
peripheral block (sercom for atmel, usart on silabs) so we can't have
the node name be "spi@...". In these cases we disable the warning
via passing '-Wno-spi_bus_bridge' to dtc.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The compatible for the ARMv8 timer should have been arm,armv8-timer and
not arm,arm-timer. The dts binding file name was correct, just the
compatible was wrong. Rename dts, binding, and associated code to use
arm,armv8-timer.
Fixes#31946
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Aligning the boostxl_ulpsense shield with all other shield
descriptions by ensuring it has a Kconfig.shield file.
This also provides the Kconfig symbol SHIELD_BOOSTXL_ULPSENSE similar
to the Kconfig symbol available for other shields.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The devicetree only provides PWM-compatible LEDs. Remove the aliases
that suggest it supports GPIO-compatible LEDs.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
To give consistency with nrf91. Also, BL2 builds are now faster since
tfm-mcuboot is fetched via west.
This reverts commit 88a865c28d.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
Rather than Kconfig vendor symbols, select stm32 watchdog using
compatible.
So user only has to enable the requested node and set
CONFIG_WATCHDOG=y.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
APL ADSP doesn't boot with reset-vector.S in the bootloader,
move it over to the main application binary.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Change the command that signing with rimage by flash script after
commitID:b553166a has been merged, that patch add a new option -D for
specify configuration, so update the command of this script.
Signed-off-by: Jian Kang <jianx.kang@intel.com>
These were removed in commit 6b58e2c0a3
but mistakenly reintroduced in
commit 51c34bb609
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add a new Kconfig CONFIG_BUILD_OUTPUT_EFI and select that for boards
that want to generate an EFI application.
Make qemu_x86_64 also generate an EFI file, however do not enable this
by default yet.
Goal is to boot qemu using EFI to be able to test this path in the
future.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We've already enabled full RAM mapping if ACPI is enabled, also
set a large 3GB address space size, these systems are not RAM-
constrained (they are PC platforms) and they have large MMIO
config spaces for PCIe.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Customers have asked for further details on the sensors available for
the product in the readme file.
Also corrects an issue where the product LEDs were mapped
backwards in the DTS file.
Signed-off-by: Greg Leach <greg.leach@lairdconnect.com>
Clean up logging menuconfig by grouping configuration into
sections like: mode, processing configuration, backends.
Additionlly, removed LOG_ENABLE_FANCY_OUTPUT_FORMATTING which is no
longer in use.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
With SDK 0.12.2 we have support to generation EFI binaries in binutils
which is needed by the zefi.py script. Now that is there we can utilize
the SDK objcopy instead of assuming the host objcopy can do this (which
would only be the case on x86 linux host systems).
Fixes#27047
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds minimal support for running zephyr as Xen guest. It
does not use xen PV console, which is somewhat hard to implement, as it
depends on xenbus infrastructure. Instead SBSA-compatible PL011 uart is
used.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
These are all PC systems which have large amounts of memory
which needs to be mapped at runtime (most are 2GB).
Increase the address space size accordingly, adding an extra
8MB for mappings.
The ACRN target has 8MB, give it 16MB of VM.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We no longer use a page pool to draw memory pages when doing
memory map operations. We now preallocate the entire virtual
address space so no allocations are ever necessary when mapping
memory.
We still need memory to clone page tables, but this is now
expressed by a new Kconfig X86_MAX_ADDITIONAL_MEM_DOMAINS
which has much clearer semantics than specifying the number
of pages in the pool.
The default address space size is now 8MB, but this can be
tuned by the application.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Just tell the kernel that RAM starts 1MB in, period.
Better simulation of a low-memory microcontroller as
we're not managing a very large number of page frames
we'll never use.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
test i2c api on microchip mec15xxevb_assy6853 board by writing
and reading data with nxp pca95xx device on board.
Signed-off-by: peng1 chen <peng1.chen@intel.com>
This allows to get much more reproducible results in terms of
amount of tests passed & failed.
But note it requires QEMU for ARC with icount support!
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
When zefi.py was changed to pass compiler and objcopy the flag to
objcopy for the EFI target was dropped. This is because the current
SDK (0.12.1) doesn't support that target type for objcopy. However,
target is necessary for the images to be created correctly and boot.
Switch back to use the host objcopy as a stop gap fix, until the SDK
can support target for EFI.
Fixes: #31517
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Enables the FlexSPI NOR flash driver, configures the FlexSPI pins, and
updates the board documentation accordingly on the mimxrt1064_evk.
Note that this SoC has two FlexSPI instances: one instance has an
in-package QSPI flash used for XIP; the other instance has a board-level
QSPI flash used for storage, not XIP. This patch enables the flash
driver on the non-XIP flash only.
Tested with:
- samples/subsys/fs/littlefs
- samples/drivers/flash_shell
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
boards: arm: Rename flexspi_qspi to flexspi_nor for mimxrt1064_evk
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the NXP FlexSPI device tree bindings to configure controller and
device properties needed for an upcoming FlexSPI flash driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Cleans up the HyperFlash device tree nodes on the mimxrt1050_evk and
mimxrt1060_evk_hyperflash boards to be more consistent with other
FlexSPI child nodes.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Remove conditionals (PM_DEEP_SLEEP_STATES and PM_SLEEP_STATES) from
power management code. Now these features are always available when
power management is enabled.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
TICKLESS_CAPABLE is now selectable only and without prompt, so remove it
from _defconfig files and select it directly by the timer.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We no longer use a page pool to draw memory pages when doing
memory map operations. We now preallocate the entire virtual
address space so no allocations are ever necessary when mapping
memory.
We still need memory to clone page tables, but this is now
expressed by a new Kconfig X86_MAX_ADDITIONAL_MEM_DOMAINS
which has much clearer semantics than specifying the number
of pages in the pool.
The default address space size is now 8MB, but this can be
tuned by the application.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Just tell the kernel that RAM starts 1MB in, period.
Better simulation of a low-memory microcontroller as
we're not managing a very large number of page frames
we'll never use.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add board support files for mimxrt1024_evk, the development board for
i.MXRT1024(CM7) SoC.
- Add pinmux, dts, doc.
- Code can be loaded to SRAM.
- Tested samples: hello_world, philosophers, synchronization,
basic/blinky, and basic/button.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Add LED and switch DTS information. Port P0 received the NVIC line 20
on Cortex-M0+ cpu. This way, SW_0 switch can be connected as external
interrupt source for both m0 and m4 cpus.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Add LED and switch DTS information. Port P0 received the NVIC line 20
on Cortex-M0+ cpu. This way, SW_0 switch can be connected as external
interrupt source for both m0 and m4 cpus.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
