The compatible for the ARMv8 timer should have been arm,armv8-timer and
not arm,arm-timer. The dts binding file name was correct, just the
compatible was wrong. Rename dts, binding, and associated code to use
arm,armv8-timer.
Fixes#31946
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To give consistency with nrf91. Also, BL2 builds are now faster since
tfm-mcuboot is fetched via west.
This reverts commit 88a865c28d.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
Rather than Kconfig vendor symbols, select stm32 watchdog using
compatible.
So user only has to enable the requested node and set
CONFIG_WATCHDOG=y.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Customers have asked for further details on the sensors available for
the product in the readme file.
Also corrects an issue where the product LEDs were mapped
backwards in the DTS file.
Signed-off-by: Greg Leach <greg.leach@lairdconnect.com>
This commit adds minimal support for running zephyr as Xen guest. It
does not use xen PV console, which is somewhat hard to implement, as it
depends on xenbus infrastructure. Instead SBSA-compatible PL011 uart is
used.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
test i2c api on microchip mec15xxevb_assy6853 board by writing
and reading data with nxp pca95xx device on board.
Signed-off-by: peng1 chen <peng1.chen@intel.com>
Enables the FlexSPI NOR flash driver, configures the FlexSPI pins, and
updates the board documentation accordingly on the mimxrt1064_evk.
Note that this SoC has two FlexSPI instances: one instance has an
in-package QSPI flash used for XIP; the other instance has a board-level
QSPI flash used for storage, not XIP. This patch enables the flash
driver on the non-XIP flash only.
Tested with:
- samples/subsys/fs/littlefs
- samples/drivers/flash_shell
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
boards: arm: Rename flexspi_qspi to flexspi_nor for mimxrt1064_evk
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the NXP FlexSPI device tree bindings to configure controller and
device properties needed for an upcoming FlexSPI flash driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Cleans up the HyperFlash device tree nodes on the mimxrt1050_evk and
mimxrt1060_evk_hyperflash boards to be more consistent with other
FlexSPI child nodes.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Remove conditionals (PM_DEEP_SLEEP_STATES and PM_SLEEP_STATES) from
power management code. Now these features are always available when
power management is enabled.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add board support files for mimxrt1024_evk, the development board for
i.MXRT1024(CM7) SoC.
- Add pinmux, dts, doc.
- Code can be loaded to SRAM.
- Tested samples: hello_world, philosophers, synchronization,
basic/blinky, and basic/button.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Add LED and switch DTS information. Port P0 received the NVIC line 20
on Cortex-M0+ cpu. This way, SW_0 switch can be connected as external
interrupt source for both m0 and m4 cpus.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Add LED and switch DTS information. Port P0 received the NVIC line 20
on Cortex-M0+ cpu. This way, SW_0 switch can be connected as external
interrupt source for both m0 and m4 cpus.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Currently configuration for STM32F746G Discovery board on reset-start
event is inherited from included files (OpenOCD stm32f7x.cfg), but
contrary to the inherited adapter speed on reset-init event, the speed
inherited for the reset-start event is only 2000 kHz, which is not
available, so a lower speed is picked up automatically generating the
following message several times when flashing the board:
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
That commit overrides that suboptimal speed for reset-start event and
sets it to the same speed as used by reset-init event, i.e. the maximum
speed (4000 kHz), so the noisy messages like the above one disappear.
The change also improves a bit the throughput when writing to the board.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
This change enables support for KSZ8794 DSA device on the ip_k66f
board. Each LAN port is defined as a DTS subnode.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch adds Kconfig entries to nRF5340-DK description that
automatically configure RPMsg Service if it is enabled for the build.
Co-authored-by: Piotr Szkotak <piotr.szkotak@nordicsemi.no>
Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
This CL provided an example of how turns on the low-voltage level
detection feature in npcx series. It demonstrates enabling low-voltage
level detection of I2C1_0 SCL/SDA io-pads if the power rail of their PUs
is 1.8V.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Part of GPIO pads in npcx series support low-voltage (1.8V) level
detection. In order to introduce this feature, this CL adds a new
NPCX-specific controller property, lvol_io_pads, in devicetree file.
For example, here is devicetree fragment which turn on low-voltage
support of i2c1_0 port.
/ {
def_lvol_io_list {
compatible = "nuvoton,npcx-lvolctrl-def";
lvol_io_pads = <&lvol_io90 /* I2C1_SCL0 1.8V support */
&lvol_io87>; /* I2C1_SDA0 1,8V support */
};
};
Then these pads will turn on 1.8V level detection during initialization.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Firmware implementing the PSCI functions described in ARM document
number ARM DEN 0022A ("Power State Coordination Interface System
Software on ARM processors") can be used by Zephyr to initiate various
CPU-centric power operations.
It is needed for virtualization, it is used to coordinate OSes and
hypervisors and it provides the functions used for SMP bring-up such as
CPU_ON and CPU_OFF.
A new PSCI driver is introduced to setup a proper subsystem used to
communicate with the PSCI firmware, implementing the basic operations:
get_version, cpu_on, cpu_off and affinity_info.
The current implementation only supports PSCI 0.2 and PSCI 1.0
The PSCI conduit (SMC or HVC) is setup reading the corresponding
property in the DTS node.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The BBC micro:bit v2 is a mini-computer that has been
designed to make the coding fun and easy to learn.
The micro:bit v2 is completely programmable so you can
easily bring your ideas to life! From making games to
creating music and even controlling robots.
The micro:bit comes with neat hardware such as a 25 LED
display, buttons, in-built speakers, Bluetooth 5 & Mesh
connectivity and sensors for temperature, motion & light.
Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
In npcx7 series, the Timer and Watchdog module (TWD) generates the
clocks and interrupts used for timing periodic functions in the system.
It also provides watchdog reset signal generation in response to a
failure detection.
The CL also includes:
— Add npcx watchdog device tree declarations.
— Zephyr watchdog api implementation.
— Add Watchdog definitions for npcx7 series in
tests/drivers/watchdog/wdt_basic_api/src/test_wdt.c for
supporting test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Configure QSPI NOR support and MX25R6435F on disco_l475_iot1 board.
Set MX25R6435F as flash controller and arrange partitions to take
newlay available space into account.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Sets the device tree chosen node for instruction tightly coupled memory
(ITCM) on all i.MX RT boards. Leverages the common Cortex-M linker
section instead of the SoC-specific one.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Now that we generate a header that extern's all possible devicetree
based device struct we can remove DEVICE_DT_DECLARE and
DEVICE_DT_INST_DECLARE as they aren't needed anymore.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace these with links to the actual documentation as needed, or
just remove them entirely. These are getting copy/pasted around and
I'm trying to avoid that happening in the future.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Only enable hardware stack protection by default on the NXP TWR-K18F
development board if userspace is not enabled.
The NXP KE1xF SoC has 8 MPU regions, which is insufficient for using HW
stack protection and userspace simultaneously.
Fixes bc9a498bdf.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Document on how memory is mapped in different configurations starting
from the MCUboot partitioning of the flash. The given examples are for
TFM use cases and dual-core samples.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Updates lpcxpresso55s69 board's documentation with mailbox and multicore
setups. Explain how _cpu1 and _ns targets are used.
Also fixes TFM related documentation.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Merges cpu0 and cpu1 targets to a single image, named multicore.bin,
this image can be found in the build folder.
Documentation is to be updated in a later commit.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
PWM, as other peripherals should not be enabled as part of
default board configuration.
Fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds the board definition files
needed to support the Arduino Nano BLE 33.
Tested: the following have been verified with
my logic analyzer.
* Serial peripherals (UART, I2C, SPI)
* USB
* RTC
Untested:
* PWM. In theory it should work but I don't
have a good enough logic analyzer to test this
* RTC's. The board doesn't have a backup battery.
The peripherals are enabled for modding another
battery in the device tree.
Signed-off-by: Jefferson Lee <jeffersonlee2000@gmail.com>
This commit adds supports for the nRF52840 based BLE Cell board from
Contextual Electronics. This board contains support for BG95 Modem,
BQ52895 charger, SD card etc and can be used as a PI Hat.
In this commit, this board supports UART, I2C, SPI, Modem. Support
for charger, SD card and other things will be added later.
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
This patch includes the rtc in the doc for the
nucleo_g474re and nucleo_g431rb boards
from STMicroelectronics
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch enables the rtc so that the testcase
tests/drivers/counter/counter_basic_api
can run on this nucleo_g071rb board
also when running sanity check
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The --nrf-family argument has been unnnecessary since 6628a16
(" runners: nrfjprog: boilerplate and recover rework").
Remove a few stragglers that are still using it, to avoid it being
copy/pasted into other board definitions.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The following features: 'i2c' and 'netif:eth' are now used in the
ip_k66f board. Let's mark them in the "supported:" section of the
ip_k66f.yaml.
The latter one is necessary as a prerequisite to run some tests (like
e.g. netif:eth is necessary to run network related ones).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Support the ST STM32 Nucleo-64 development board with
STM32L433RC SoC.
Tested samples: hello_world, blinky and button.
Signed-off-by: Matija Tudan <mtudan@mobilisis.hr>
By default nrfjprog presumes the pin reset will be used, and helpfully
enables it regardless of whether CONFIG_GPIO_PINRESET is selected or
not. Stop it from doing this so the second button can be used for the
application as requested.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The SAME70-XPLD board comes with an EEPROM that holds the MAC address
to be used with its Ethernet interface. Enable that feature by
default, so the application doesn't have to.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The NPCX SMB modules provides full support for a two-wire SMBus/I2C
synchronous serial interface. Each SMBus/I2C interface is a two-wire
serial interface that is compatible with both Intel SMBus and Philips
I2C physical layer. There are 8 SMBus modules and 10 buses in NPCX7
series.
In NPCX7 series, the SMB5 and SMB6 modules contain a two-way switch to
support two separate SMBus/I2C buses (ports) with one SMB module
(controller) Please refer Section 4.7.2 in the datasheet. In order to
support it, this CL seperates the i2c driver into port and controller
drivers. The controller driver is in charge of i2c module operations
and internal state machine. The port driver is in charge of pin-mux
and connection between Zehpyr i2c api interface and controller driver.
All of modules have separate 32-byte transmit FIFO and 32-byte receive
FIFO buffers. These FIFO buffers reduce firmware overhead during long
SMBus transactions by allowing the Core to write or read more than one
data byte at a time to/from the SMB module.
The CL also includes:
— Add npcx i2c port/controller device tree declarations.
— Zephyr i2c api implementation.
— Add "i2c-0" aliases in npcx7m6fb.dts for i2c test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Change-Id: I211817620db2130ffb275a5962a24bf90aad57e9
Co-authored-by: Kevin Townsend <kevin@ktownsend.com>
Signed-off-by: David Vincze <david.vincze@linaro.org>
Musca-S1 is a Cortex-M33 based SoC. It's similar to the
Musca-B1, but among other things the embedded flash has
been replaced with embedded MRAM (eMRAM) memory.
The Musca-S1 files have been created based on the Musca-B1
SoC and board files.
Add the Musca-S1 board to the list of allowed platforms
for the TF-M integration examples.
Change-Id: I4f517d28d0a5b8c4a3fc3fab73adb5519acfc3c2
Signed-off-by: David Vincze <david.vincze@linaro.org>
This branch adds support for the nucleo_f303k8 board.
The configuration is based on the nucleo_l011k4,
the f302r8 and the ST reference manual.
I had successfully tested the following sample code:
blinky
blink_led (uses TIM2_CH1 on PA0)
button
hello_world
Signed-off-by: Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
Apart from the previously added pins, nRF21540's GPIO interface includes
also MODE pin. This commit adds this pin to relevant devicetree.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
The FEM requires a dedicated SPI interface. This commit puts it on SPI3,
removing the arduino SPI support.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
There are three groups of sensors on this board, each of which
requires a different I2C bus configuration and a different power
supply. Currently only the CCS811 is supported.
Change the board configuration to pull the necessary information about
the CCS811 supply switch from devicetree, and to supply power based on
whether the device is enabled in devicetree (rather than whether a
driver is selected). The implementation is designed to support
additional supply switches (there are at least six on the board, most
of which are dedicated).
Also document the I2C configuration necessary for the other sensors.
There is currently no way to select alternative configurations without
editing the devicetree binding, but at least they're available for use
in overlays.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Enable spi1 interface that connects to STM module SPBTLE-RFTR on the
stm32l562e_dk board.
Tested the configuration with st_ble_sensor sample + ST BLE Sensor
app on Android phone.
Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
Defines partitions that can be used by mcuboot on nucleo_h743zi board.
Please note that mcuboot is not yet supported on stm32 h7 family as the
write-block-size is greater than 8.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
for the signing procedures for boards an521, nrf5340, nrf9160,
nucleo_l552ze_q, and musca_b1.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
There is a GPIO driver for use with arty so enable the GPIO feature in
the board yaml to get some testing of it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update the documentation of nRF5340 to stress that
TF-M is the default solution for building the Secure
image.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Extend the nRF5340 board's CMakeLists.txt file to
support building TF-M without BL2 for nRF5340. The
result of the build is a single merged-hex containing
TF-M (SPE) and Zephyr (NSPE).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Re-adjust the available RAM advertized by the nRF5340 DK
and PDK .yml files (Application core, Non-Secure version
of the board).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Modify the default partitioning of the Application core
SRAM, for Secure and Non-Secure domain, to accommodate
the default build configuration of TF-M. The RAM TF-M
uses should fit into the sram0_secure. The partitioning
should match what TF-M is allocating to secure and non-
secure domain.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When building with TF-M support (for non-secure Zephyr
applications) default to build TF-M without BL2 support.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Enable building with TF-M by default on nRF5340 DK Application
core (cpuapp) when building for the non-secure version of the
board.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Rework the runner to improve various issues.
Every board.cmake file for an nRF SoC target is repeating boilerplate
needed for the nrfjprog runner's --nrf-family argument. The
information we need to decide the --nrf-family is already available in
Kconfig, so just get it from there instead. Keep the --nrf-family
argument around for compatibility, though.
This cuts boilerplate burden for board maintainers.
We also need to revisit how this runner handles recovery to fix it
in nRF53 and keep things consistent everywhere else.
To cleanly handle additional readback protection features in nRF53,
add a --recover option that does an 'nrfjprog --recover' before
flashing. Keep the behavior consistent across SoCs by supporting it on
those too. Because this is expected to be a bit tricky for users to
understand, check if a --recover is needed if the 'nrfjprog --program'
fails because of protection, and tell the user how to fix it.
Finally, instead of performing a separate 'nrfjprog --eraseall', just
give --chiperase to 'nrfjprog --program' process's arguments instead
of --sectorerase. This is cleaner, resulting in fewer subprocesses and
avoiding an extra chip reset.
Having a separate 'west flash --recover' option doubles the number of
test cases if we want to keep exhaustively enumerating them. That
doesn't feel worthwhile, so update the test cases by picking a
representative subset of the possibilities. Each test now has enough
state that it's worth wrapping it up in a named tuple for readability.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE
and use PM_ as the prefix for all PM related Kconfigs
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Defines partitions that can be used by mcuboot on nucleo_h743zi board.
Please note that mcuboot is not yet supported on stm32 h7 family as the
write-block-size is greater than 8.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
NPCX7 includes a 10-bit resolution Analog-to-Digital Converter (ADC). Up
to 10 voltage inputs can be measured and a internal voltage reference
(VREF), 2.816V (typical) is used for measurement. It can be triggered
automatically in Autoscan mode. Each input channel is assigned a
separate result register, which is updated at the end of the conversion.
The CL also includes:
— Add npcx adc device tree declarations.
— Zephyr adc api implementation.
— Add adc definitions of npcx7 in
tests/drivers/adc/adc_api/src/test_adc.c for supporting test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The SAM4E/S SoC have a ROM bootloader named SAM-BA. Add bossac
to the board west runner list. This requires Zephyr SDK 0.12.0.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
SRAM base address and size are currently hardcoded in the defconfig.
This is wrong because symbols like KERNEL_RAM_SIZE and KERNEL_VM_BASE
are not currently being set. Fix this by adding the correct DTS entry.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Set building TFM with MCUboot. Set the build configuration to
profile_medium, we need smaller TFM images to fit into flash.
Build MCUboot, TFM, sign it, sign Zephyr NS image and merge all the
images. Also change the other configuration, BL2=OFF, to merge as a
single image.
Update documentation on how to flash the board.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Create a special configuration when BL2=OFF is set. DTS partitioning is
used for MCUboot, but does not match TFM's flash_layout.h configuration
when BL2=OFF, DTS matches when BL2=ON.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Refactor lpcxpresso55s69's partitions to match TFM's flash_layout.h
configuration. This matches TFM with MCUboot configuration.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
I don't have much explanation for this change except that
I can't program soc on these boards with this option being set.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Similar to what was done for other h7 based boards,
use 'connect_assert_srst' and fix init routine.
Fixes#29732
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Resource sharing between m7 and m4 core was a bit abusive
as the whole SERIAL ports where disabled on m4 core.
Since it is possible to use a finer grain resource sharing and
having no serial node configured could lead to compilation issue
in some samples assign usart8 to m4 target.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On these 3 stm32h7 based boards, 'connect_assert_srst' should
be used in order to be able to program after board unplug/plug.
Problem is that 'connect_assert_srst' prevents gdb-attach procedure
to complete which now requires 'reset halt' to be performed before
hand.
Fix this by forcing 'reset halt' by introducing a new init routine.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Since this board is fully supported on openocd,
let's use openocd to comply with other boards and
remove the dependency on stm32cubeprogrammer.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some pins on the arduino header and on the mikrobus header were wrong.
These are now corrected. They are the same on the lpcxpresso55s28
board.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
According to boards schematics, user button is pulled down by
external resistor when not pressed and pushing the button sets
it to high.
Fixes#30224
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a note in the documentation regarding the required
nRF Command Line Tools for properly working with the
nRF5340 DK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The current SAM4S define at board level common flags that should be on
soc defines. Add common flags at SoC Kconfig defines and drop the
correspondent at board defines.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current SAM4E define at board level common flags that should be on
soc defines. Add common flags at SoC Kconfig defines and drop the
correspondent at board defines.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The bug on TFM that prevented to enable MPU on NS side is
fixed on TFM current version.
MPU can now be safely enabled on NS target.
Fixes: #27809
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Discussion while adding the blackpill_f401ce board definition brought
up a few issues with the blackpill_f411ce board definition, which are
addressed in this commit:
* doc/index.rst had a typo
* support/openocd.cfg was incorrectly using the f4discovery profile,
which was fixed by using a custom profile for the SoC instead
* removed SoC from blackpill_f411ce.dts compatible line
* added support for jlink flash option
Signed-off-by: Kalyan Sriram <coder.kalyan@gmail.com>
Duplicates the existing blackpill_f411ce board definition for the
blackpill_f401ce board (WeAct Blackpill V3.0), which has identical specs
except for 84MHz clock (instead of 100Mhz) and 96K SRAM (instead of
128K).
Signed-off-by: Kalyan Sriram <coder.kalyan@gmail.com>
Update nrf21540 DTS to support FEM configuration and update other pins
according to te board datasheet
Signed-off-by: Jakub Pegza <Jakub.Pegza@nordicsemi.no>
The gpio port of D4 on the arduino header was incorrect and is now
corrected to PF_14.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
I have experienced some problems when flashing this board using OpenOCD.
Adding `connect_assert_srst` forces reset assertion before any
connection atempt (`srst_nogate` is required).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add i2c1 interface for stm32l552xx and stm32l562xx microcontrollers
and enable i2c1 that connects to lsm6dso sensor module on the
stm32l562e_dk board.
Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
Fix typos, inconsistent naming and formatting issues.
Also setting CONFIG_NFCT_PINS_AS_GPIOS=y because NFC is not used.
Signed-off-by: Martin Jäger <martin@libre.solar>
Add Kconfig options that will be used by the module
to call the function with the desired parameters.
Refactor the tfm_integration samples and
the supported boards.
Update west.yml to bring in Cmake changes that use the new KConfigs.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
Support for the NUCLEO-L031K6 development board with STM32L031K6 SoC.
Although the SoC only contains 32k flash and 8K RAM, it has been tested
on a number of samples and has worked as expected.
Signed-off-by: Steven Daglish <s.c.daglish@gmail.com>
This is done to facilitate multi image build systems
where child images could be associated with a different
core than the parent image.
In such situations, the name of the board associated with
the core of the child image must be known.
Boards for the 'CPUNET' domain is already in place.
This commit adds the boards for the 'CPUAPP' domain.
These would be needed if the parent image is build in the
'CPUNET' domain, and the child image is in the 'CPUAPP'
domain.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
For the application core, the `--device` parameter specifies only
the generic `cortex-m33`, so it is impossible for the debugger to
flash the target.
For the network core, the `--device` parameter is not present at all,
so it is even impossible to run the `debug` command.
This commit fixes the above issues by specifying the proper devices.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Move i2c to defconfig
Add documentation
Improve dts
Remove unnecessary option and only use the default ones.
Provide a default Active state directly in the device tree
Fix copyright
Signed-off-by: Stephane Dorre <stephane.dorre@gmail.com>
Disable setting CONFIG_SOC_FAMILY_NRF manually
Limit SPI frequency to 8MHz
configure new st7789v in device tree
Signed-off-by: Sergey Koziakov <dya.eshshmai@gmail.com>
Basic sample program that uses the one led and button from the Pinetime.
Led will turn on everytime the button is pushed.
Signed-off-by: Rafa Couto <caligari@treboada.net>
The nRF5340 (P)DK is equipped with the MX25R64 flash memory. Add a dts
node for that chip in the board definition as well as the missing QSPI
node in the nRF5340 SoC definition.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the board image file in the nrf5340 documentation,
reflecting the fact that we now document the nRF5340 DK
instead of the PDK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Update the docs of nRF5340 board, to point to the
nRF5340 DK instead of the PDK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Convert handful of users of DEVICE_INIT to DEVICE_DEFINE or
SYS_DEVICE_DEFINE to allow deprecation of DEVICE_INIT.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update PWM pinctrl signal names of all non-F1 STM32 boards.
`pwm` variant is not available anymore on non-F1 series.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
We deprecate nRF5340 PDK and add a note that
the board will be replaced by nRF5340 DK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Nordic Dev Kit board names were changed in Zephyr
v2.3 release, following the standard Board deprecation
policy. Two releases later we do not need to keep
references to the old names in the boards' documentation.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Replaces all existing variants of value clamping with the MIN and MAX
macros with the CLAMP macro.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Add support for the recently introduced STM32CubeProgrammer runner.
Updated documentation to mention its availability as latest official
OpenOCD releases do not support H7 series.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
There is no user USB port available on these boards.
Remove support and remove files when no more needed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Enables the fat_fs sample on the mm_swiftio board by adding a
board-specific Kconfig overlay, and adding sdhc to the list of
board-supported features.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Following migration of pinctrl configuration from pinmux.c files
to device tree and deprecation of pinctrl defines, remove
pinmux.c files when possible.
Additionally remove the CMakeLists.txt files when it makes sense.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update documention to refer to MEC152x specifications and
SPI image generator. MEC152x is the actual production SOC.
The only difference is the Boot-ROM loader SPI image layout.
Preserve the link to the old, MEC1501 SPI image generator.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Move STM32 based board USB pin configuration to device tree.
Exceptions:
* olimex_stm32_h407: Node not enabled and not documented.
Signal added in disabled node.
* L0/G4 based boards as signals are not available yet.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This qemu device is REALLY slow in icount mode. When I run it outside
of icount and watch the simulator advance the clock device in real
time, it looks to me like it expects the counter to be running at ~125
MHz. But it's set to a 12 MHz clock rate in its config, and trying to
use a 1000 Hz tick rate.
At those settings (and with the shift=3 argument to icount), I'm
measuring about 10k cycles to handle a minimal timer interrupt. But
if you do the math, that comes to 12k cycles per tick. The interrupt
takes as long as a tick! That would never work, except for the fact
that the timer driver on this device cheats and doesn't try to align
to ticks (basically ignoring all the lost time). And even that breaks
on the scheduler_api test (which does both tick and cycle math and
tries to compare them) when it's fixed to properly align itself.
One solution might be to set the clock rate to what qemu appears to
believe is the correct 125 MHz value. And that causes the test to
complete, but all tests now take ~10 minutes of real time because the
simulator is so slow!
So just make up some clock rates, it's a simulated platform after all.
I chose 5 MHz cycle time and 100 Hz tick rate, which on my device is
about half of "real" speed and very acceptable.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Refactors nxp i.mx, kinetis, and lpc board-level device trees to use
DT_SIZE_K and DT_SIZE_M macros to define external memory sizes. This is
self documenting and easier to read.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
I2S signals should now be configured using dt.
For nucleo_f411re, I2S pins were configured using SPI definitions
that pulled the same strings behind the scene as I2S would have done.
This being said, only CK and SD pins should be needed and were
documented, so I only left those.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This board has a multi-level power domain hierarchy where a sensor has
its own power control that is accessed through an external GPIO
peripheral that itself has a power control.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
In the flash partition definitions for ARM boards,
the link to the legacy partition macros does not
exist any more. The commit cleans up the partition
definition by removing this link.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
As a proof of concept, turn USB signals configuration to USB
for nucleo_wb5rg and disco_l475_iot1 boards.
This implicitly remove pull-up on _ID pin, which turn out to
have no side effect.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Sets the device tree chosen node for data tightly coupled memory (DTCM)
on i.mx rt boards that aren't already using DTCM as the chosen SRAM.
Leverages the common cortex-m linker section instead of the soc-specific
one.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Removes the DATA_LOCATION Kconfig symbol from the i.mx rt soc series and
refactors corresponding boards to use a device tree chosen node instead.
The external SDRAM is chosen on all boards that can support it;
otherwise the internal DTCM is chosen.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
File names such as pcie_ep_bcm_iproc.c / pcie_ep_bcm_iproc_regs.h
seem unnecessarily long, same with CONFIG symbols' names.
Let's shorten them by replacing 'bcm_iproc' with simply 'iproc'.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
The SPI NOR device on this board supports fastread, 2READ, DREAD,
4READ, and QREAD for read opcodes, but only PP and QPP for write
opcodes. Provide a clue to people trying to use 2READ with 2PP: it
won't work.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Deprecate the Musca-A board and SoC support to be removed in 2.6.0.
There are a number of issues with the Musca-A and there exists both the
Musca-B and Musca-S1.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
