In NPCX7 series, it contains two tachometer (TACH) modules that contains
two Independent timers (counter 1 and 2). They are used to capture a
counter value when an event is detected via the external pads (TA or
TB).
The CL also includes:
— Add npcx tachometer device tree declarations.
— Zephyr sensor api implementation for tachometer.
— Enable "tach1" device in npcx7m6fb.dts for testing.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Place the new signing code in the TFM module CMakeLists.txt.
Make some small tweaks and add a sentence to the docs.
In the process, make a few changes to the signing code:
- Change some names of files created.
- Minimize the number of files created.
- Use hex files instead of bin files. This is so we don't need to know
the offset when creating hex files from bin files.
Also add signing for MCUBOOT_IMAGE_NUMBER=1 based on the code from the
v2m_musca_b1 board, though, this board does not build with =1 now
because of (I assume) some flash aliasing which places the S and NS
images 0x10000000 apart, where the manual algorithm places them next to
each other. It builds with =2, though.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
This CL introduces power management driver that improves the efficiency
of ec operation by adjusting the chip’s power consumption to the level
of activity required by the application in npcx series.
The following list summarizes the main properties of the various chip
power states. Please refer the power.c file for more detail.
Main power states in npcx series include:
- Active: Core, RAM and modules operate at the clocks generated by PLL.
- Idle: Enter this state when the Core executes WFI or WFE instruction.
- Sleep: clock is stopped for most of modules but PLL is enabled.
- Deep Sleep: As Sleep mode but PLL is disabled.
- Standby: All power rails are turned off besides standby and battery
power rails.
And this CL implements one power state, PM_STATE_SUSPEND_TO_IDLE, with
two sub-states for Zephyr power management system.
Sub-state 0 - "Deep Sleep" mode with “Instant” wake-up if residency
time is greater or equal to 1 ms
Sub-state 1 - "Deep Sleep" mode with "Standard" wake-up if residency
time is greater or equal to 201 ms
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces a kernel device driver implemented by the internal
64/32-bit timers in Nuvoton NPCX series. Via these two kinds of timer,
the driver provides an standard "system clock driver" interface.
It includes:
- A system timer based on an ITIM64 (Internal 64-bit timer) instance,
clocked by APB2 which freq is CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC.
- Its prescaler is set to 1 and provide the kernel cycles reading
without handling overflow mechanism.
- A event timer based on an ITIM32 (Internal 32-bit timer) instance,
clocked by LCLK which frequency is 32KHz and still activated when ec
entered "idle/deep idle" power state for better power consumption.
- Its prescaler is set to 1 and provide timeout event mechansim.
- Compensate system timer which clock is gating for better power
consumption after ec left"idle/deep idle" power state.
This CL passed starve, timer_api, and timer_monotonic test suites.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
When proper target device is specified, instead of generic
Cortex-M33, JLinkGDBServer is able to flash the device on "load"
command.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Do not attempt to build/run all tests. Emulation platforms should
primarily build kernel and architecture related tests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Quoting from the QEMU manual "MTTCG is not compatible with -icount and
enabling icount will force a single threaded run.". Given that for
Cortex-A53 we haven't seen any particular problem when disabling icount
try to disable it.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
CLOCK_STM32_PLL_XTPRE Kconfig symbol default value is n.
Then there is no need to explicitly set it to 'n' in stm32f1 boards
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The choice allowed for using TFM's own default. We now need full
knowledge over whether BL2 is enabled or not (e.g. to do signing),
so remove this option and simplify to a bool.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
Add the missing pieces to enable XIP for AArch64. Try to simulate the
XIP using QEMU using the '-bios' parameter.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Provide the arduino_i2c node name from i2c_0.
Provide pinmux for frdm_stbc_agm01.
The frdm_stbc_agm01 supplies access to an FXOS8700 and FXAS21002.
when using frdm_stbc_agm01 with frdm_k22f, the FXAS21002 sample
sensor project can be utilized and the FXOS8700 sample sensor
project utilizes the shield's FXOS8700.
Signed-off-by: Ryan Holleran <rhollerar@gmail.com>
Even though possible to use external pull-up and open drain buffer,
prefer internal pull-up to reduce power consumption.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This commit moves TFM CMakeLists.txt into Zephyr and relocates the
Kconfig.tfm file under the modules/tfm folder.
Updates the manifest to point to related TFM changes.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Remove support for the Musca-A board. This board is rarely used, few
are available and superceded by Musca-B and Musca-S.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This CL moves def_lvol_io_list device-tree node from npcx7m6fb_evb.dts
to npcx7m6fb.dtsi. The benefit of it is that we needn't add
def_lvol_io_list node for each board dts file if there are no 1.8V
io-pads on the platform. If so, add them in the specific board dts file
directly.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
- Updated arduino dtsi to map spi1 as arduino spi
- Made board's zephyr peripheral mapping more compact and added arduino
and st-link labels.
Signed-off-by: Nikos Oikonomou <nikoikonomou92@gmail.com>
Set the Zephyr Vendor Specific HCI extensions as default y on nRF boards
that only support host only builds.
Correct this for nrf5340dk which had set the Kconfig for the feature
support instead of the feature itself.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
nRF5340 PDK board was deprecated in v2.5.0 release
and is removed now from the tree.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Stm32f7 disco boards benefit from dedicated openocd board target.
Use these target as the generic stm32f7discovery one will be
eventually removed.
Additionally, replace now deprecated 'adapter_khz' by 'adapter speed'.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
All of these boards can be debugged with west debug via settings in
board.cmake, but the docs say they can't be. This is being copy/pasted
around; fix it.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Increase the size of ram/flash given in nrf5340dk_nrf5340_cpuapp.yaml
so they match the actual numbers which are available for default
tests and samples.
Signed-off-by: Maciej Perkowski <Maciej.Perkowski@nordicsemi.no>
A number of SoCs have overlapping devices at the same unit address.
Surpress the warning for those cases:
* NRF - kmu@39000 & flash-controller@39000
* NRF - clock@5000 & power@5000
* NRF - image@20000000 & image_s@20000000
* NRF - i2c@40003000 & spi@40003000
* STM - i2s@40003800 & spi@40003800
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A number of SoCs have overlapping devices at the same unit address.
Surpress the warning for those cases:
* Atmel - pinmux@41004400 & gpio@41004400
* Atmel - pinmux@41004480 & gpio@41004480
* Atmel - pinmux@41008000 & gpio@41008000
* NXP - flash@0 & gpio@0
* NXP - syscon@0 & gpio@0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On Atmel & Silabs SoCs the SPI controller is implemented on a shared
peripheral block (sercom for atmel, usart on silabs) so we can't have
the node name be "spi@...". In these cases we disable the warning
via passing '-Wno-spi_bus_bridge' to dtc.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The compatible for the ARMv8 timer should have been arm,armv8-timer and
not arm,arm-timer. The dts binding file name was correct, just the
compatible was wrong. Rename dts, binding, and associated code to use
arm,armv8-timer.
Fixes#31946
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To give consistency with nrf91. Also, BL2 builds are now faster since
tfm-mcuboot is fetched via west.
This reverts commit 88a865c28d.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
Rather than Kconfig vendor symbols, select stm32 watchdog using
compatible.
So user only has to enable the requested node and set
CONFIG_WATCHDOG=y.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Customers have asked for further details on the sensors available for
the product in the readme file.
Also corrects an issue where the product LEDs were mapped
backwards in the DTS file.
Signed-off-by: Greg Leach <greg.leach@lairdconnect.com>
This commit adds minimal support for running zephyr as Xen guest. It
does not use xen PV console, which is somewhat hard to implement, as it
depends on xenbus infrastructure. Instead SBSA-compatible PL011 uart is
used.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
test i2c api on microchip mec15xxevb_assy6853 board by writing
and reading data with nxp pca95xx device on board.
Signed-off-by: peng1 chen <peng1.chen@intel.com>
Enables the FlexSPI NOR flash driver, configures the FlexSPI pins, and
updates the board documentation accordingly on the mimxrt1064_evk.
Note that this SoC has two FlexSPI instances: one instance has an
in-package QSPI flash used for XIP; the other instance has a board-level
QSPI flash used for storage, not XIP. This patch enables the flash
driver on the non-XIP flash only.
Tested with:
- samples/subsys/fs/littlefs
- samples/drivers/flash_shell
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
boards: arm: Rename flexspi_qspi to flexspi_nor for mimxrt1064_evk
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the NXP FlexSPI device tree bindings to configure controller and
device properties needed for an upcoming FlexSPI flash driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Cleans up the HyperFlash device tree nodes on the mimxrt1050_evk and
mimxrt1060_evk_hyperflash boards to be more consistent with other
FlexSPI child nodes.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Remove conditionals (PM_DEEP_SLEEP_STATES and PM_SLEEP_STATES) from
power management code. Now these features are always available when
power management is enabled.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add board support files for mimxrt1024_evk, the development board for
i.MXRT1024(CM7) SoC.
- Add pinmux, dts, doc.
- Code can be loaded to SRAM.
- Tested samples: hello_world, philosophers, synchronization,
basic/blinky, and basic/button.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Add LED and switch DTS information. Port P0 received the NVIC line 20
on Cortex-M0+ cpu. This way, SW_0 switch can be connected as external
interrupt source for both m0 and m4 cpus.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Add LED and switch DTS information. Port P0 received the NVIC line 20
on Cortex-M0+ cpu. This way, SW_0 switch can be connected as external
interrupt source for both m0 and m4 cpus.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Currently configuration for STM32F746G Discovery board on reset-start
event is inherited from included files (OpenOCD stm32f7x.cfg), but
contrary to the inherited adapter speed on reset-init event, the speed
inherited for the reset-start event is only 2000 kHz, which is not
available, so a lower speed is picked up automatically generating the
following message several times when flashing the board:
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
That commit overrides that suboptimal speed for reset-start event and
sets it to the same speed as used by reset-init event, i.e. the maximum
speed (4000 kHz), so the noisy messages like the above one disappear.
The change also improves a bit the throughput when writing to the board.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
This change enables support for KSZ8794 DSA device on the ip_k66f
board. Each LAN port is defined as a DTS subnode.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch adds Kconfig entries to nRF5340-DK description that
automatically configure RPMsg Service if it is enabled for the build.
Co-authored-by: Piotr Szkotak <piotr.szkotak@nordicsemi.no>
Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
This CL provided an example of how turns on the low-voltage level
detection feature in npcx series. It demonstrates enabling low-voltage
level detection of I2C1_0 SCL/SDA io-pads if the power rail of their PUs
is 1.8V.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Part of GPIO pads in npcx series support low-voltage (1.8V) level
detection. In order to introduce this feature, this CL adds a new
NPCX-specific controller property, lvol_io_pads, in devicetree file.
For example, here is devicetree fragment which turn on low-voltage
support of i2c1_0 port.
/ {
def_lvol_io_list {
compatible = "nuvoton,npcx-lvolctrl-def";
lvol_io_pads = <&lvol_io90 /* I2C1_SCL0 1.8V support */
&lvol_io87>; /* I2C1_SDA0 1,8V support */
};
};
Then these pads will turn on 1.8V level detection during initialization.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Firmware implementing the PSCI functions described in ARM document
number ARM DEN 0022A ("Power State Coordination Interface System
Software on ARM processors") can be used by Zephyr to initiate various
CPU-centric power operations.
It is needed for virtualization, it is used to coordinate OSes and
hypervisors and it provides the functions used for SMP bring-up such as
CPU_ON and CPU_OFF.
A new PSCI driver is introduced to setup a proper subsystem used to
communicate with the PSCI firmware, implementing the basic operations:
get_version, cpu_on, cpu_off and affinity_info.
The current implementation only supports PSCI 0.2 and PSCI 1.0
The PSCI conduit (SMC or HVC) is setup reading the corresponding
property in the DTS node.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The BBC micro:bit v2 is a mini-computer that has been
designed to make the coding fun and easy to learn.
The micro:bit v2 is completely programmable so you can
easily bring your ideas to life! From making games to
creating music and even controlling robots.
The micro:bit comes with neat hardware such as a 25 LED
display, buttons, in-built speakers, Bluetooth 5 & Mesh
connectivity and sensors for temperature, motion & light.
Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
In npcx7 series, the Timer and Watchdog module (TWD) generates the
clocks and interrupts used for timing periodic functions in the system.
It also provides watchdog reset signal generation in response to a
failure detection.
The CL also includes:
— Add npcx watchdog device tree declarations.
— Zephyr watchdog api implementation.
— Add Watchdog definitions for npcx7 series in
tests/drivers/watchdog/wdt_basic_api/src/test_wdt.c for
supporting test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Configure QSPI NOR support and MX25R6435F on disco_l475_iot1 board.
Set MX25R6435F as flash controller and arrange partitions to take
newlay available space into account.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Sets the device tree chosen node for instruction tightly coupled memory
(ITCM) on all i.MX RT boards. Leverages the common Cortex-M linker
section instead of the SoC-specific one.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Now that we generate a header that extern's all possible devicetree
based device struct we can remove DEVICE_DT_DECLARE and
DEVICE_DT_INST_DECLARE as they aren't needed anymore.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace these with links to the actual documentation as needed, or
just remove them entirely. These are getting copy/pasted around and
I'm trying to avoid that happening in the future.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Only enable hardware stack protection by default on the NXP TWR-K18F
development board if userspace is not enabled.
The NXP KE1xF SoC has 8 MPU regions, which is insufficient for using HW
stack protection and userspace simultaneously.
Fixes bc9a498bdf.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Document on how memory is mapped in different configurations starting
from the MCUboot partitioning of the flash. The given examples are for
TFM use cases and dual-core samples.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Updates lpcxpresso55s69 board's documentation with mailbox and multicore
setups. Explain how _cpu1 and _ns targets are used.
Also fixes TFM related documentation.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Merges cpu0 and cpu1 targets to a single image, named multicore.bin,
this image can be found in the build folder.
Documentation is to be updated in a later commit.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
PWM, as other peripherals should not be enabled as part of
default board configuration.
Fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds the board definition files
needed to support the Arduino Nano BLE 33.
Tested: the following have been verified with
my logic analyzer.
* Serial peripherals (UART, I2C, SPI)
* USB
* RTC
Untested:
* PWM. In theory it should work but I don't
have a good enough logic analyzer to test this
* RTC's. The board doesn't have a backup battery.
The peripherals are enabled for modding another
battery in the device tree.
Signed-off-by: Jefferson Lee <jeffersonlee2000@gmail.com>
This commit adds supports for the nRF52840 based BLE Cell board from
Contextual Electronics. This board contains support for BG95 Modem,
BQ52895 charger, SD card etc and can be used as a PI Hat.
In this commit, this board supports UART, I2C, SPI, Modem. Support
for charger, SD card and other things will be added later.
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
This patch includes the rtc in the doc for the
nucleo_g474re and nucleo_g431rb boards
from STMicroelectronics
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch enables the rtc so that the testcase
tests/drivers/counter/counter_basic_api
can run on this nucleo_g071rb board
also when running sanity check
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The --nrf-family argument has been unnnecessary since 6628a16
(" runners: nrfjprog: boilerplate and recover rework").
Remove a few stragglers that are still using it, to avoid it being
copy/pasted into other board definitions.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The following features: 'i2c' and 'netif:eth' are now used in the
ip_k66f board. Let's mark them in the "supported:" section of the
ip_k66f.yaml.
The latter one is necessary as a prerequisite to run some tests (like
e.g. netif:eth is necessary to run network related ones).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Support the ST STM32 Nucleo-64 development board with
STM32L433RC SoC.
Tested samples: hello_world, blinky and button.
Signed-off-by: Matija Tudan <mtudan@mobilisis.hr>
By default nrfjprog presumes the pin reset will be used, and helpfully
enables it regardless of whether CONFIG_GPIO_PINRESET is selected or
not. Stop it from doing this so the second button can be used for the
application as requested.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The SAME70-XPLD board comes with an EEPROM that holds the MAC address
to be used with its Ethernet interface. Enable that feature by
default, so the application doesn't have to.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The NPCX SMB modules provides full support for a two-wire SMBus/I2C
synchronous serial interface. Each SMBus/I2C interface is a two-wire
serial interface that is compatible with both Intel SMBus and Philips
I2C physical layer. There are 8 SMBus modules and 10 buses in NPCX7
series.
In NPCX7 series, the SMB5 and SMB6 modules contain a two-way switch to
support two separate SMBus/I2C buses (ports) with one SMB module
(controller) Please refer Section 4.7.2 in the datasheet. In order to
support it, this CL seperates the i2c driver into port and controller
drivers. The controller driver is in charge of i2c module operations
and internal state machine. The port driver is in charge of pin-mux
and connection between Zehpyr i2c api interface and controller driver.
All of modules have separate 32-byte transmit FIFO and 32-byte receive
FIFO buffers. These FIFO buffers reduce firmware overhead during long
SMBus transactions by allowing the Core to write or read more than one
data byte at a time to/from the SMB module.
The CL also includes:
— Add npcx i2c port/controller device tree declarations.
— Zephyr i2c api implementation.
— Add "i2c-0" aliases in npcx7m6fb.dts for i2c test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Change-Id: I211817620db2130ffb275a5962a24bf90aad57e9
Co-authored-by: Kevin Townsend <kevin@ktownsend.com>
Signed-off-by: David Vincze <david.vincze@linaro.org>
Musca-S1 is a Cortex-M33 based SoC. It's similar to the
Musca-B1, but among other things the embedded flash has
been replaced with embedded MRAM (eMRAM) memory.
The Musca-S1 files have been created based on the Musca-B1
SoC and board files.
Add the Musca-S1 board to the list of allowed platforms
for the TF-M integration examples.
Change-Id: I4f517d28d0a5b8c4a3fc3fab73adb5519acfc3c2
Signed-off-by: David Vincze <david.vincze@linaro.org>
This branch adds support for the nucleo_f303k8 board.
The configuration is based on the nucleo_l011k4,
the f302r8 and the ST reference manual.
I had successfully tested the following sample code:
blinky
blink_led (uses TIM2_CH1 on PA0)
button
hello_world
Signed-off-by: Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
Apart from the previously added pins, nRF21540's GPIO interface includes
also MODE pin. This commit adds this pin to relevant devicetree.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
The FEM requires a dedicated SPI interface. This commit puts it on SPI3,
removing the arduino SPI support.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
There are three groups of sensors on this board, each of which
requires a different I2C bus configuration and a different power
supply. Currently only the CCS811 is supported.
Change the board configuration to pull the necessary information about
the CCS811 supply switch from devicetree, and to supply power based on
whether the device is enabled in devicetree (rather than whether a
driver is selected). The implementation is designed to support
additional supply switches (there are at least six on the board, most
of which are dedicated).
Also document the I2C configuration necessary for the other sensors.
There is currently no way to select alternative configurations without
editing the devicetree binding, but at least they're available for use
in overlays.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Enable spi1 interface that connects to STM module SPBTLE-RFTR on the
stm32l562e_dk board.
Tested the configuration with st_ble_sensor sample + ST BLE Sensor
app on Android phone.
Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
Defines partitions that can be used by mcuboot on nucleo_h743zi board.
Please note that mcuboot is not yet supported on stm32 h7 family as the
write-block-size is greater than 8.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
for the signing procedures for boards an521, nrf5340, nrf9160,
nucleo_l552ze_q, and musca_b1.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
There is a GPIO driver for use with arty so enable the GPIO feature in
the board yaml to get some testing of it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update the documentation of nRF5340 to stress that
TF-M is the default solution for building the Secure
image.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Extend the nRF5340 board's CMakeLists.txt file to
support building TF-M without BL2 for nRF5340. The
result of the build is a single merged-hex containing
TF-M (SPE) and Zephyr (NSPE).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Re-adjust the available RAM advertized by the nRF5340 DK
and PDK .yml files (Application core, Non-Secure version
of the board).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Modify the default partitioning of the Application core
SRAM, for Secure and Non-Secure domain, to accommodate
the default build configuration of TF-M. The RAM TF-M
uses should fit into the sram0_secure. The partitioning
should match what TF-M is allocating to secure and non-
secure domain.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When building with TF-M support (for non-secure Zephyr
applications) default to build TF-M without BL2 support.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Enable building with TF-M by default on nRF5340 DK Application
core (cpuapp) when building for the non-secure version of the
board.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
