Commit Graph

5789 Commits

Author SHA1 Message Date
Maxmillion McLaughlin
8ab1c75e9b feat: add support for TDK NTCG103JF103FT1 thermistor
Adds compensation table and bindings for NTCG103JF103FT1 thermistor

Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
2023-12-08 10:04:12 +00:00
Manuel Argüelles
18202d0db3 soc: nxp: s32k146: add LPSPI support
Add LPSPI nodes to S32K1xx devices.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-12-06 20:57:42 -06:00
Manuel Argüelles
3b354bfc57 soc: nxp: s32k146: add LPI2C support
Add LPI2C nodes to S32K1xx devices. S32K146 has a single
LPI2C instance.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-12-06 20:57:42 -06:00
Sumit Batra
e0dc6f4fe4 drivers: sensor: qdec_s32: Add QDEC support for S32
Add code to configure and program Lcu, Trgmux and Emios_Icu IPs to
get the the rotations by the motor in radians.

Co-authored-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Co-authored-by: Mayank Mahajan <mayankmahajan.x@nxp.com>
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
2023-12-06 20:06:37 -06:00
Conor Paxton
13f8d80930 dts: riscv: add all contexts and devices to the plic on mpfs
Microchip's PolarFire SoC has a total of 9 contexts associated with the
Platform Interrupt controller (PLIC). the E51 core has a single context
(M Mode), and the application processor U54 cores have two each (M mode
and S mode, respectively)

While we are at it, there are a total of 186 interrupts, not 187.

Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
2023-12-06 17:54:29 +00:00
Conor Paxton
3c7f10f8e1 dts: riscv: rename PolarFire SoC using device family name
Microchip's PolarFire SoC (device family name: MPFS) is not specific to
the Icicle Kit. Rename the devicetree sources to be more generic and to
align with Linux and allow for other development boards to adopt.

Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
2023-12-06 17:54:29 +00:00
Aaron Ye
1b3d29c53e dts: arm: ambiq: Add GPIO instances to Apollo4 Blue Plus SoC
This commit instantiates the GPIO peripherals.
Also enables GPIO instances for apollo4p_blue_kxr_evb.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2023-12-06 12:11:30 +00:00
Fabio Baltieri
808c0f1f78 input: kbd_matrix: add actual-key-mask support
Add an optional actual-key-mask property to filter out key combinations
that are not implemented in the actual keyboard matrix.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-12-06 09:16:45 +00:00
Fabian Blatz
d94d226fe1 modules: lvgl: input: add zephyr,lvgl-keypad-input device binding
Add a pseudo device which can be used to hook into input events and
emit lvgl keypad events.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2023-12-06 09:15:50 +00:00
Emil Lindqvist
1cd7c55af9 modem: modem_cellular: add U-blox SARA-R5 as modem
U-blox SARA-R4 already exists but the behavior is different,
requiring a separate driver instance. For instance, R5 autostarts,
so this commit also adds support for skipping power on pulse.

Signed-off-by: Emil Lindqvist <emil@lindq.gr>
2023-12-05 16:29:55 -06:00
Erwan Gouriou
3bbc2cc9e1 dts: stm32wba: Introduce stm32wba55Xg package
Based on stm32wba55, stm32wba55Xg is similar from device tree description
to stm32wba52Xg.

Take the opportunity to fix stm32wba52Xg descriuption scheme which was
missing stm32wba52.dtsi.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-12-05 14:53:39 +00:00
Jamie McCrae
3d3b287b79 dts: arm: nordic: nrf53/nrf91: Fix GPREGRET register addresses
Fixes an issue with the register addresses which was caused by a
missing `ranges;` option for the power peripheral

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-12-05 10:23:12 +00:00
Zhang Peng
a7b7364c4e dts/xtensa/nxp: Add dtsi for imx8ulp
Add file nxp_imx8ulp.dtsi for imx8ulp

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2023-12-04 16:41:00 +00:00
Fabio Baltieri
3862c227d4 input: gpio_kbd_matrix: add poll and scan mode support
Add a poll and scan mode for the driver. If any of these are set, the
driver does not use the GPIO interrupts to detect when the matrix has to
switch to polling mode. Instead, it keeps polling it all the time,
either by enabling all the columns and poll the rows for activity, or
just keep scanning all the time.

Poll mode is useful if the specific SoC used does not support GPIO
interrupt on all the row GPIOs at the same time, scan mode if it does
not even support selecting all the columns at the same time.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-12-04 16:40:35 +00:00
Fabio Baltieri
56d73a8b0c input: kbd_matrix: always poll if poll_timeout_ms is 0
Tweak the polling mode so that the driver never exit polling mode if
poll_timeout_ms is 0. This is useful if the specific driver does not
support idle mode.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-12-04 16:40:35 +00:00
Laurentiu Mihalcea
fd8ac9e6cd drivers: interrupt_controller: Add driver for NXP's IRQ_STEER IP
This commit introduces a new interrupt controller driver used
for NXP's IRQ_STEER IP.

Apart from introducing the driver itself, this commit contains
the following changes:
	1) Switch i.MX8MP to using the XTENSA core interrupt
	controller instead of the dummy irqsteer one.
		* this is required because the binding for the
		irqsteer driver is no longer a dummy one
		(since it's being used by the irqsteer driver).
		As such, to avoid having problems, switch to
		using another dummy binding.
	2) Modify the irqsteer dummy binding such that it
	serves the IRQ_STEER driver's needs.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-12-04 09:52:38 -06:00
Francois Ramu
a65ebbd6bc dts: arm: stm32f7 vref calibration address fixed
This PR set the correct value for the stm32F7 devices.
And change vrefint-cal-addr to <0x1FF07A2A> for stm32F722-F723
soc serie.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-12-04 14:46:54 +01:00
Marcio Ribeiro
76c4187bb0 drivers: sensor: esp32s3 internal temperature sensor
Support for esp32s3 internal temperature sensor on Zephyr

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2023-12-04 14:32:09 +01:00
Christopher Friedt
e2cd8d6416 dts: bindings: dma: add bindings for an emulated dma controller
Many driver APIs are opting to provide an `emul` driver
implementation that can be used for a number of purposes.

- providing an ideal / model driver for reference
- configurable backends
- seamless integration with device tree
- support for native posix, qemu, and any other board
- fast regression testing of app and library code

Provide an initial set of bindings for `zephyr,dma-emul` devices.

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2023-12-03 19:22:31 -05:00
Martí Bolívar
b1532ce449 devicetree: remove label property accessors
These were first deprecated in v3.2. We have kept support for them
for as long as we can, but now their presence is causing CI failures
in some configurations. Specifically, using the deprecated 'label'
property is causing a warning which is promoted to an error in some
twister runs. This is blocking other forward progress in the
devicetree API.

I tried to rework the tests to avoid this, but it was too much effort
for the time I had to work on the task. Removing the APIs is therefore
unfortunately the best way forward to unblocking other work.

Re-work the test suite a bit to maintain coverage where we are using
the label property to test other macros.

Add a migration guide section to help with the transition.

Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2023-12-01 13:09:56 -08:00
Jonas Remmert
a004cb4b75 dt-bindings: sensor: lps2xdf: make macros sensor agnostic
The possible settings for the lps22df and lps28dfw sensor are overlapping,
except the Full-Scale mode setting. Threrefore we can change the macros
from LPS22DF_DT_[..] to LPS2xDF_DT_[..].

Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
2023-12-01 12:19:05 -06:00
Jonas Remmert
7a2fcc419e drivers/sensor: add support to LPS28DFW pressure sensor
The LPS28DFW is an ultracompact, piezoresistive, absolute pressure sensor.
Compared to the LPS22DF, the LPS28DFW is waterproof and has a Dual FS
capability and does not have SPI. This commit extends the LPS22DF driver to
be compatible with the LPS28DFW device.

Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
2023-12-01 12:19:05 -06:00
Aaron Ye
70ce5e4c6b dts: arm: ambiq: Update the GPIO instances
Use the "ambiq,gpio" binding to combine the "ambiq,gpio-bank"
child nodes for Apollo4 Plus soc.
Also update the GPIO driver accordingly.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2023-12-01 16:25:47 +01:00
Aaron Ye
a24f0f0b1d dts: binding: gpio: Add Ambiq gpio and gpio-bank bindings.
This Ambiq gpio binding provides the GPIO pin mapping for GPIO child
nodes tosolve the limitation of the maximum 32 pins handling in GPIO
driver API.
The gpio-bank nodes can be created under the gpio parent node.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2023-12-01 16:25:47 +01:00
Mateusz Sierszulski
e0eadd5f6b dts: arm: ambiq: Add GPIO instances to SoC
This commit instantiates the GPIO peripherals.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-12-01 16:25:47 +01:00
Mateusz Sierszulski
fb016b6843 drivers: gpio: add Ambiq GPIO driver
This commit adds GPIO driver for Apollo4 SoCs.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-12-01 16:25:47 +01:00
Erwan Gouriou
0c541d7ad0 drivers: uart: stm32: Allow enabling FIFO mode
Add required bits to allow FIFO mode enabling.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-12-01 10:52:49 +00:00
HaiLong Yang
ba476c4b8a drivers: flash: update gd32 fmc v2
This fix some incorrect implement in gd32 flash v2 driver, also add
support to gd32a503 series.

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2023-12-01 10:51:52 +00:00
Wilfried Chauveau
85af32e16e arch: arm: remove num-mpu-regions
Remove this property presumably unused.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
2023-12-01 10:48:00 +00:00
Wilfried Chauveau
5b3d4598a7 dts: arm: Blanket remove all usages of arm,num-mpu-regions
This removes all occurrences of arm,num-mpu-regions relying on the value
reported by the register instead.
A user may still define this property if they need to have a compile time
definition for it.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
2023-12-01 10:48:00 +00:00
Wilfried Chauveau
3fcc505b41 dts: bindings: mmu_mpu: Mark arm,num-mpu-regions as optional
The C code does not required this parameter to be defined and falls back
to the MPU_TYPE's register to return the appropriate value.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
2023-12-01 10:48:00 +00:00
Manuel Argüelles
81de2af68f dts: arm: introduce support for NXP S32K146
Add minimal support for S32K146 devices including clocks, MPU,
pin control, GPIO and UART.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-11-30 11:21:59 -05:00
Bartosz Bilas
55f2d72cd4 drivers: eth_esp32: allow selecting ref clk source
In case of boards where REF_CLK signal is not connected
to the GPIO0 by default add the possibility to use
the optional GPIO16/GPIO17 as a REF CLK source.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2023-11-30 10:02:31 +01:00
Patryk Koscik
77b49ab587 dts: arm: rpi_pico: Add compat string to rp2040
This commit adds compatible string to the `rp2040` SoC node.

Signed-off-by: Patryk Koscik <pkoscik@antmicro.com>
2023-11-30 10:01:54 +01:00
Daniel DeGrasse
9e4b57398f dts: arm: nxp: rt1015: correct FlexRAM bank allocation
Although the RT1015 only supports 128 KB of FlexRAM being used at once, the
default fusemap overallocates 160KB of FlexRAM. The JLink flashloader
algorithm appears to rely on the 64KB of DTCM in the default fusemap
being configured. Reducing the DTCM allocation resulted in JLink
failing to flash the SOC.

To resolve this, utilize the default fusemap of {O, O, D, D, I} for the
RT1015 FlexRAM setup. Add a note about the restrictions on using
overallocated FlexRAM to the SOC DTSI.

Fixes #65889

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-11-29 11:21:40 -06:00
Fabio Baltieri
874e973446 bindings: gnss: renmae quectel,lc76g.yaml
This was probably meant to have a comma, not a dash.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-29 14:30:40 +00:00
Declan Snyder
fa73697735 drivers: eth_nxp_enet: Support PTP
Support PTP functionality in NXP ENET MAC driver

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder
39d056b3c3 dts: bindings: Add NXP ENET PTP binding
Add binding for NXP ENET PTP Clock device

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder
57dd852fda dts: bindings: Add NXP ENET bindings
Add bindings for compatibles related to NXP ENET IP.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder
5724ce78fc drivers: ethernet: phy: Add KSZ8081 PHY Driver
Add Driver for KSZ8081 Ethernet PHY. The Generic MII Driver
is not sufficient to use for this PHY chip which has special
vendor implemented behaviors.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder
e7dac64ce1 dts: bindings: Add binding for KSZ8081 PHY
Add DT Binding for Microchip KSZ8081 PHY

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder
7e88ab54e2 dts: bindings: ethernet-controller: Add phy mode
Add a property to the ethernet controller binding
indicating what type of connection the MAC has with
the PHY device.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Christopher Friedt
37e19451ec drivers: misc: devmux: a device multiplexer pseudo-device
The Device Multiplexer (devmux) is a pseudo-device that can
be used to select between multiple included sub-devices.

It is experimental, but its current use is in system
remediation. Take for example, the scenario where the
system console and log subsystem both have the uart backend
enabled. The case may arise, where the chosen backing uart
could be an abstraction of another very high-bandwidth bus
- such as a PCIe BAR, a UDP socket, or even even just memory.

If the "service" (for lack of a better term) that backs this
abstract "uart" experiences an error, it is of critical
importance to be able to switch the system console, uart log
backend, or whatever to another uart (semi-transparently) in
order to bring up a shell, continue to view system logs, or
even just support user console I/O.

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2023-11-28 15:35:39 +01:00
Christopher Friedt
afc59112a9 device: support for mutable devices
Add support for mutable devices. Mutable devices are those which
can be modified after declaration, in-place, in kernel mode.

In order for a device to be mutable, the following must be true

  * `CONFIG_DEVICE_MUTABLE` must be y-selected
  * the Devicetree bindings for the device must include
    `mutable.yaml`
  * the Devicetree node must include the `zephyr,mutable` property

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2023-11-28 15:35:39 +01:00
Fabio Baltieri
d14066b061 drivers: gnss: add a generic NMEA GNSS driver
Add a generic NMEA GNSS driver.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-28 15:33:28 +01:00
Benjamin Perseghetti
0fa204b9fd drivers: net: phy: add tja1103
Adds the tja1103 enet phy for setting phy options on the mr_canhubk3.

Co-authored-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
2023-11-28 08:07:44 -06:00
Manuel Argüelles
d2ea187228 drivers: mdio: add support for NXP S32 GMAC
MDIO controller is part of GMAC and it requires GMAC ethernet driver to
initialize first because it will reset the whole GMAC hw block during
initialization. Both C22 and C45 APIs are supported.

Co-authored-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
2023-11-28 08:07:44 -06:00
Jun Lin
91fdef0783 soc: npcx: add support for npcx9mfp
Add new SoC npcx9mfp support for npcx9 series.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2023-11-28 09:13:23 +00:00
Balsundar Ponnusamy
5df70f8a63 dts: arm64: intel: intel_socfpga: Adding nodes for watchdog
add dts support for watchdog to accomodate watchdog driver bringup on
aglex and agilex5

Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2023-11-27 20:00:29 +01:00
Balsundar Ponnusamy
ba3a71eda7 drivers: watchdog: wdt_dw: support for resetting watchdog
add support for resetting watchdog IP through reset manager driver

Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2023-11-27 20:00:29 +01:00