We might have to do this differently:
Configure rng default clock in .dtsi
Set board specific config in .dts
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
SRAM6 is used by RF and should be defined as RAM_NOCACHE
to allow unaligned access reads.
"IO" might be a better match but is not available on this arch.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to enable BLE support on STM32WBA, following APIs are implemented:
- HostStack_: BLE Controller scheduling
- ll_sys_: Link layer API required for scheduling
- UTIL_TIMER_: BLE Controller timer utility
- LINKLAYER_PLAT_: BLE controller utilities
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The condition for channel-map are CONFIG_BT_CENTRAL ||
CONFIG_BT_BROADCASTER, change the corresponding handler ifdef so that
it's included in the build if CONFIG_BT_BROADCASTER is enabled but
CONFIG_BT_CENTRAL is not.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
In init function, start timer with period CYC_PER_TICK if tickless is
not enabled, This change is for fixing the issue that disabling
CONFIG_TICKLESS_KERNEL the OS tick is not work issue, this
causes the OS not starting scheduling correctly.
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
Imported the original Cooper (Apollo4x BLE controller) device files
from AmbiqSuite SDK 4.4.0 and adapts them to support the new
implemented HCI driver for Apollo4 Blue Plus.
Signed-off-by: Aaron Ye <aye@ambiq.com>
The BT HCI uses internal IOM4 (SPI4) for communication bus.
Set the default configuration for BT based on the controller supported
capability and HCI driver dependency.
Signed-off-by: Aaron Ye <aye@ambiq.com>
This commits create the dts binding for Ambiq BT HCI instance.
And create the SPI based common HCI driver for Ambiq Apollox
Blue SoC and the extended soc driver for HCI.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Fix a possible race condition in the keyboard matrix library where a key
would get pressed between the last read and reenabling the (edge
sensitive) interrupt and the even would be lost.
The window for this to happen is very narrow and had to artificially add
a sleep to reproduce it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the interrupt setup from both edge to edge to active. Edge to
active is all was needed anyway and it makes this compatible with gpio
controller that only support single edge interrupt.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit introduces `kconfig_to_ot_option` to simply fye the way of
adding openthread related kconfigs.
Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
The DC233C core has support for both i-cache and d-cache.
So mark it as such so we can test caching of Xtensa in QEMU.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
With MMU enabled on Xtensa, user_buffer is not marked as
executable. Invalidating the i-cache by region will cause
an instruction fetch prohibited exception. So skip all
i-cache tests, instead of just the range ones to avoid
confusions of only running the test partially.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
() arch_icache_line_size_get() needs to be inlined or else
compiler would complain that it is not being used.
() arch_icache_flush_all() returns -ENOTSUP not as there is
no xthal_icache_all_writeback() in HAL.
() Fix typo vid -> void in arch_icache_disable().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove converting bit to string and comparing the string instead of
ready helpers. The "Check if thread is in use" seems to check only
that parameters state_buf and sizeof(state_buf) not zero.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add a device driver to read events from a Linux evdev device node and
inject them back as Zephyr input events.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Not clearing that lock lead to the fs_mgmt commands being useless, after
the mgmt callback returned `MGMT_CB_ERROR_RC` once, since the lock is now
occupied and never cleared.
Fixes#66581
Signed-off-by: Ruben Völl <ruben.voell@grandcentrix.net>
Add DT overlay to be able to support and test UDC DWC2 driver
(snps,dwc2) on nucleo_f413zh board. This disables STM32 shim
driver described and configured on the SoC and board level.
Obviously,it should work with other STM32F4 boards as well and we
could have a mechanism to apply it generically using snippets.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The driver currently supports only dedicated FIFO mode (with
dynfifosizing if enabled). Control, bulk and interrupt transfers are
supported, isochronous transfers are not yet supported. The driver
accesses controller registers using sys_io.h, but for debugging purposes
one can get a register map from the driver's config, similar to the
usb_dc_dw.c driver.
Initial support also has vendor quirks for the STM32F4 SoC family.
Tested on NUCLEO-F413HG.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Use new common header and remove usb_dw_registers.h.
No functional changes, only renaming of registers and field identifiers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This header is based on drivers/usb/device/usb_dw_registers.h and
describes registers of the DWC2 controllers IP and is intended for use
in both device controller drivers and a host controller driver. The
difference to usb_dw_registers.h is that this header does not confuse
offsets with bit positions, contains all the definitions required for
device mode, has register and bit field names identical to the databook
and no annoying underscores.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit adds implementation of GDB stub for 32-bit ARM. It has been
tested only on the Zynq-7000 SoC and I would like to get any feedback
from others.
The stub still has these issues:
- To implement single stepping, it uses instruction address mismatch
breakpoint, as recommended in ARMv7 reference. The breakpoint control
register is configured (the state control fields) for the "PL0,
Supervisor and System modes only" option. Otherwise the breakpoint
would also halt the processor in abort mode, in which the stub loop
runs. Zephyr kernel runs in the system mode. This works well until the
kernel enables interrupts, as interrupt handlers typically run in
Supervisor mode. Single stepping therefore sometimes "catches" a
handler instead of the next application instruction. I have not tried
User mode, because Cortex-A SoCs do not appear to have the
ARCH_HAS_USERSPACE flag.
Cc: Michal Sojka <michal.sojka@cvut.cz>
Signed-off-by: Marek Vedral <marek.vedral@gmail.com>
This commit adds a devicetree overlay file and an extra condition in the
CMakeLists.txt file to allow remote debugging for the qemu_cortex_a9
board.
Signed-off-by: Marek Vedral <marek.vedral@gmail.com>
If GDBSTUB is enabled and the kernel runs in tickless mode, the timer
must not convert the delta cycles to a 32-bit data type (cycle_diff_t in
this case). The delta_ticks variable would overflow and the next timeout
would be set before the current timestamp, thus generating an interrupt
right after leaving the handler. As a result, the system would receive
tens of thousands of interrupts per second and would not boot.
Cc: Michal Sojka <michal.sojka@cvut.cz>
Signed-off-by: Marek Vedral <marek.vedral@gmail.com>
rtc_get_time() on STM32 does not implement the -ENODATA return code.
This prevents testing the initialisation status of the RTC.
Fixed by reading INITS flag and adding a error path in
rtc_stm32_get_time().
Signed-off-by: Adrien Bruant <adrien.bruant@aalberts-hfc.com>
This reverts commit bffa0c6bddbc91d39f4b01baa34e3d0595760d50.
This FIFO implementation causes a regression by which the SPI
peripheral generates several spurious SCK cyles after the last
data has been sent.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Pin configuration value generated by RA_PINCFG_xxx macro is incorrect if
pin number is greater than 9 due to a mistake in the pin numbering.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
pm_suspend_devices() could return an error. Set timeout using
sys_clock_set_timeout() to after this error is handled so that
we have the accurate power state when calling the timeout function.
This is useful in cases where we wish to compensate the
system timer for certain power modes.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Adds test that verifies correct Proxy advertisement behavior for
a device where the Proxy adv requirements changes over time,
both for single and multiple subnets.
Signed-off-by: Anders Storrø <anders.storro@nordicsemi.no>
Refactors proxy advertising implementation to allow fair sharing of
advertising resources between all subnets.
In the new implementation, each subnet is agnostic to any other subnet
that might have active proxy advertisement work. When proxy
advertisement is triggered, the implementation will first check how
many subnets that has active work. If there are more than one active
subnet, a maximum timeslot will be calculated to ensure that all active
subnets get access to the medium. The implementation will then poll
the next eligible subnet for a proxy advertising request. If the
duration of this request exceeds the maximum timeslot, the duration
for the next advertisement will be set to the maximum value.
If a proxy advertisement for a subnet is interrupted by other
advertising activity, the implementation will now ensure that the
interrupted proxy adv continues from the point where it was
interrupted so that the subnet gets to utilize the entire allocated
timeslot.
This PR also alters the priv_proxy_net_id_multi Bsim test to align
with the refactored proxy advertising scheme.
Signed-off-by: Anders Storrø <anders.storro@nordicsemi.no>
The section 3.7.3.1 of the mesh specification recommends to delay
a message publication in certain cases:
- at power-up or upon state change for a time between 20 to 500 ms
- for periodic publications for a time between 20 to 50 ms
This change implements this recommendation by adding the
`CONFIG_BT_MESH_DELAYABLE_PUBLICATION` Kconfig option which enables
the randomization code and by adding the `bt_mesh_model_pub.delayable`
bit field which allows each model decide whether the publications
should be delayed for this model or not.
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
Its default value (100 ms) resulted in PDUs big enough to never make it
through on a slow enough UART (e.g. ~1152-byte PDUs on a UART@115200).
The UART TXs were silently aborted.
A no-timeout value is now allowed and made the default.
Additional warnings are logged when it is likely that a UART TX
was aborted due to a too low timeout for the used baud rate.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
- Disable UART when the PPP interface is brought down.
This prevents an error when it is next brought up.
- Change the level of certain logs to be less concerning
and less verbose.
- Fix warnings regarding the passed parameter types of %p conversions.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
* Add a subsection linking to the emulators section.
* Added more internal links
* Fixed EPROM simulator/emulator mix, and added link
to simulator
* For the RTC peripheral, mention there is no driver for
it yet.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Zephyr does not support MLDv1 (which has a shorter header than MLDv2),
and this resulted in log errors being printed on header access if MLDv1
queries were received. Since receiving such packet is not really an
error, just drop it silently.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
