Commit Graph

117736 Commits

Author SHA1 Message Date
Chris Friedt
3e30e2eddd tests: lib: move time testsuite to c_lib
Presumably the time testsuite was separate from the c library set of
testsuites because it had a depedency on POSIX.

Since that dependency no longer exists, colocate the time testsuite
with the other c library testsuites.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
9ecb7965b6 tests: libc: thrd: use sys_clock_gettime() and timespec_add()
Use sys_clock_gettime() instead of clock_gettime() and use
timespec_add() instead of manually adding timespec structures.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
ec62630950 tests: libc: thrd: use timespec_from_timeout()
Use `timespec_from_timeout(K_MSEC(msec), &ts)` instead of leaning on
lazily-crafted timespecs with invalid tv_nsec fields.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
a17497162e tests: libc: thrd: do not pass NULL for thrd_sleep() duration
The specification does not say that the first struct timespec passed to
thrd_sleep() may be NULL.

Preserving the testpoint so that a possible future testsuite can be
run that expects faults to occur when undefined behaviour is used.

Faults are one possible solution to handling undefined behaviour, but
it would be good to come to a concensus about how that should be
handled in Zephyr for standard function calls belonging to ISO C or
POSIX.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
a5a824db91 tests: libc: thrd: compare with thrd_success rather than ok or zero
The C standard does not guarantee that `thrd_success` is equal to
zero, so ensure that the test takes that into account.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
49cc01d4b5 libc: common: thrd: use sys_clock_nanosleep() instead of nanosleep()
Reduce the dependency on POSIX by taking advantage of the newly added
sys_clock_nanosleep().

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
ff7825b9aa libc: use the common libc time() implementation for most libcs
Use the implementation of time() from the common libc, since there
it no longer pulls in POSIX.

Use is implied for minimal, newlib, and picolibc, and selected
for IAR.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
17964083d3 libc: common: time: use sys_clock api rather than posix
Remove POSIX clock_gettime() from the common libc time implementation,
since POSIX should not be a dependency for ISO C.

Instead, use the newly added lib/os sys_clock API.

Specifically, sys_clock_gettime().

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
7868b4d54d logging: use sys_clock_gettime()
Use the newly added sys_clock_gettime() to avoid the unnecessary
dependency on POSIX APIs.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
bb7aa4dd79 doc: release: 4.2.0: add sys_clock gettime settime nanosleep notes
Add bullets to release notes for sys_clock_gettime(),
sys_clock_settime(), and sys_clock_nanosleep().

These changes were significant, as they make timekeeping dependencies
more independent between libc and posix, and remove several unnecessary
dependencies on posix for ISO C library routines.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
a3e934f12c sys: clock: additional sys_clock api calls
Additional entries for the sys_clock API, comprised of:

* sys_clock_gettime()
* sys_clock_settime()
* sys_clock_nanosleep()

along with the constants

* SYS_CLOCK_REALTIME
* SYS_CLOCK_MONOTONIC
* SYS_TIMER_ABSTIME

The primary motivation for this API is so that libc and other
libraries have a familiar-enough API to reach to when POSIX
is not available, since POSIX is optional in Zephyr.

By adding this API to lib/os, we also eliminate dependency cycles
between libc and posix, as lib/os is a mutual dependency.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
282b47cf37 posix: cond + mutex: log messages generate warnings for 32-bit timeouts
Previously, log messages would generate warnings (escalated to errors
in CI) when CONFIG_TIMEOUT_64BIT=n.

For example,

```
west build -p auto -b qemu_cortex_m0 -t run tests/posix/timers/ \
  -- -DCONFIG_TIMEOUT_64BIT=n
..
warning: format '%llx' expects argument of type \
  'long long unsigned int', but argument 3 has type 'k_ticks_t' \
  {aka 'unsigned int'}
```

Use portable print specifiers and cast the argument to int64_t.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Chris Friedt
e363fdd16b scripts: ci: check_compliance: allow CONFIG_BOARD_UNIT_TESTING
Previously, code like the snippet below would not pass compliance checks.
With this change, we add `CONFIG_BOARD_UNIT_TESTING` to the Kconfig allow
list, so that code like the snippet below is not incorrectly reported as
a compliance failure.

```
if defined(CONFIG_BOARD_UNIT_TESTING)
/* unit-testing only */
endif
```

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-06-24 14:18:52 +02:00
Phi Tran
3fa9495172 drivers: gpio: add gpio interrupt support for RX130
- Add support for gpio interrupt on RX130.
- Add support for gpio-keys input subsys on RSK_RX130_512KB boards.

Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
2025-06-24 14:18:41 +02:00
Phi Tran
da38a779ea drivers: external interrupt: add external interrupt support for RX130
Add support for external interrupt on RX130.

Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
2025-06-24 14:18:41 +02:00
Tatsuya Ogawa
5560c9f12a drivers: interrupt_controller: Add interrupt controller support for RX130
Add interrupt controller driver support for RX130 series

Signed-off-by: Tatsuya Ogawa <tatsuya.ogawa.nx@renesas.com>
Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2025-06-24 14:18:41 +02:00
Maochen Wang
f4a0beb2b7 samples: net: wifi: Enable NXP_WIFI_TX_RX_ZERO_COPY for IW610
Enable NXP_WIFI_TX_RX_ZERO_COPY for IW610, which will reduce extra memcpy
between net stack and driver in TX data path and avoid the allocation of
RXPD and mlan_buffer in RX data path, to improve the throughput
performance.
Increase CONFIG_NET_BUF_DATA_SIZE to hold one packet in one buffer.
NXP_WIFI_TX_RX_ZERO_COPY can be enabled not only for NXP_RW610 case.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-06-24 09:17:03 +02:00
Raymond Lei
7a582c5586 drivers: nxp: flexio: mask invalid ISR calling
Flexio ISR handle all flags even they are not interrupt enabled.
This will cause invalid calling of ISR callback functions.

Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
2025-06-24 09:16:51 +02:00
John Barbero Unenge
f7f73bd0c3 driver: flash: mcux_flexspi_nor: Second attempt to fix is25lpXXX chips
This commit changes the implementation to distinguish between is25lpXXX
and is25lpXXXd. Using RDERP as in the original solution didn't work for
is25wpXXX chips and would cause a halt. This new implementation reads
the AutoBoot register instead, which is not present in is25lpXXX but
present in is25lpXXXd, is25wpXXX and is25wpXXXd.

Tested on:
- mimxrt1020-evk
- mimxrt1170-evk rev. A
- custom board with mimxrt1170 and is25lp128d

Signed-off-by: John Barbero Unenge <git@lsrkttn.com>
2025-06-24 09:16:04 +02:00
Maochen Wang
a9fd2306e4 manifest: update hal_nxp for RW612 and IW610 FW
upgrade RW612 FW to version 6.p40,
upgrade IW610 FW to version 5.p66.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-06-24 09:15:56 +02:00
Pieter De Gendt
f14907eb3e boards: nxp: mimxrt1170_evk: Add note for Arduino R3 gpio input interrupts
For future developers to hopefully save some time trying to figure out why
no GPIO interrupt callback is fired.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-06-24 09:15:40 +02:00
Gang Li
fd7201c52d boards: mimxrt1060: add lpuart8 pinctrl nodes for RT1060
The lpuart8 pinctrl nodes for RT1060 need to be defined, as WIFI + BT
(bt_tester) scenario requires three uart.
- LPUART1: shell uart
- LPUART3: bt hci uart
- LPUART8: uart pipe

Signed-off-by: Gang Li <gang.li_1@nxp.com>
2025-06-24 09:15:20 +02:00
Tahsin Mutlugun
dd5681a217 tests: counter: counter_basic_api: Enable tests for MAX32657EVKIT
Add overlay files for MAX32657EVKIT secure and nonsecure boards.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-06-24 09:15:07 +02:00
Anıl Kara
adba582424 boards: adi: max32657: Enable PWM driver
PWM is added to the supported list for max32657evkit.

Signed-off-by: Anıl Kara <anil.kara@analog.com>
2025-06-24 09:15:07 +02:00
Tahsin Mutlugun
7336d1faed boards: adi: max32657evkit: Enable counter driver
Add counter to the list of supported drivers for MAX32657EVKIT secure
and nonsecure boards.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-06-24 09:15:07 +02:00
Anıl Kara
34b06f89fe dts: arm: adi: Add timer nodes to max32657
Add nodes timer0 to timer5. Add pwm and counter subnodes.

Signed-off-by: Anıl Kara <anil.kara@analog.com>
2025-06-24 09:15:07 +02:00
cyliang tw
03f919fc4c drivers: spi: fix numaker spi driver bug of frame size
Set right frame size in spi_context_buffers_setup and fetch
the right rx size based on frame size. Also clear SPI control register
before set mode & data width in spi configure routine.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-06-24 09:14:33 +02:00
Bjarki Arge Andreasen
ce95b7033c pm: device_runtime: fix unbalanced domain get/put
pm_device_runtime has inconsistent behavior regarding
getting and putting a device's domain. This commit
aligns it to get the domain only once, once device
is resumed, and put only once, once device is
suspended.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-06-24 09:14:20 +02:00
Bjarki Arge Andreasen
21b785da38 tests: pm: device_power_domain: test async put
Assert async put correctly releases device's power domain.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-06-24 09:14:20 +02:00
Pisit Sawangvonganan
d0b9a4e43e drivers: wifi: nxp: use IS_ENABLED() for CONFIG_NXP_WIFI_SOFTAP_SUPPORT
Replaced conditional compilation of `CONFIG_NXP_WIFI_SOFTAP_SUPPORT`
where applicable with IS_ENABLED() macro to improve code readability.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2025-06-24 09:13:58 +02:00
Pisit Sawangvonganan
2265dd7a93 drivers: wifi: nxp: fix include guard typo in nxp_wifi_drv.h
Fix include guard name and added trailing comment to final #endif.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2025-06-24 09:13:58 +02:00
Laurentiu Mihalcea
4c8a2ac715 boards: nxp: imx8qxp_mek: add esai0 default pin configuration
Add pad definitions and the pin configuration for i.MX8QXP MEK's
ESAI0.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2025-06-24 09:13:45 +02:00
Laurentiu Mihalcea
d474f0a177 boards: nxp: imx8qm_mek: add esai0 default pin configuration
Add pad definitions and the pin configuration for i.MX8QM MEK's
ESAI0.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2025-06-24 09:13:45 +02:00
Laurentiu Mihalcea
44f346e6d7 dts: bindings: dai-esai: allow pinctrl-related properties
Allow pinctrl-related properties to be specified in the ESAI
DT node.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2025-06-24 09:13:45 +02:00
Laurentiu Mihalcea
de3b598f9f drivers: dai: esai: support applying default pin configuration
Add support for applying the default pin configuration.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2025-06-24 09:13:45 +02:00
Laurentiu Mihalcea
1f483b37ea drivers: clock_control: mcux_ccm: support QM/QXP's ESAI/AUD_PLL1 clocks
Add support for gating/ungating IMX8QM/IMX8QXP's ESAI clocks and the
AUD_PLL_DIV_CLK0 clock used as source for ESAI's EXTAL.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2025-06-24 09:13:45 +02:00
Laurentiu Mihalcea
34d888cbba drivers: dai: esai: add support for runtime PM
Add support for runtime PM.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2025-06-24 09:13:45 +02:00
Francois Ramu
e11ca43123 doc: release-notes-4-2: new DTS properties for the QSPI of STM32 devices
Change to apply on the DTS of STM32 soc and boards with QSPI nodes

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-06-24 09:13:33 +02:00
Francois Ramu
45ce78adf0 samples: code_relocation_nocopy: update macro for flash size and address
In case of the st,stm32-qspi-nor compatible
new property and node definitions will requires new macro
to get the external NOR flash base address and size
Add the config for running the sample on stm32l475 disco kit

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-06-24 09:13:33 +02:00
Francois Ramu
e35ac8f972 boards: st: stm32 boards qspi-nor-flash DTS configuration
This change defines the "st,stm32-qspi-nor" compatible Node
in conformance to the DTS specifications
Includes the size property (in Bits) of the external memory device

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-06-24 09:13:33 +02:00
Francois Ramu
6e5d1393b6 drivers: flash: stm32 qspi driver size and address of the external NOR
New property of the st,stm32-qspi-nor compatible gives
the external NOR flash in bits.
The property of the st,stm32-qspi compatible gives
the external NOR flash base address

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-06-24 09:13:33 +02:00
Francois Ramu
aac2c5c568 dts: arm: stm32 reg definition for the st,stm32-qspi compatible
The st,stm32-qspi compatible is defining the reg property
with the register address and size at first index
followed by the external mem base address and max allocated size.
For the stm32F412, stm32F7, stm32L4, stm32H7, stm32WB series.
qspi is addressing max 256 MBytes from 0x90000000.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-06-24 09:13:33 +02:00
Francois Ramu
ec9f74f57d dts: bindings: flash controller size of the stm32 qspi nor
This change adds the size in Bits of the flash nor memory
for the st,stm32-qspi-nor compatible

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-06-24 09:13:33 +02:00
Ravi Dondaputi
11a3969221 drivers: wifi: Introduce option to use K_HEAP
Provide option to revert to K_HEAP instead of using
dedicated heaps in Wi-Fi driver.

Signed-off-by: Ravi Dondaputi <ravi.dondaputi@nordicsemi.no>
2025-06-24 09:13:20 +02:00
Peter Fecher
dfc193f65c boards: phyboard_pollux: Update documentation
Add I2C documentation for phyBOARD Pollux.
Fixes spelling issues.

Signed-off-by: Peter Fecher <p.fecher@phytec.de>
2025-06-24 09:13:04 +02:00
Peter Fecher
03d7673a15 boards: phytec: phyboard_pollux: Add i2C config
Adds I2C Devicetree node configuration for phyBOARD Pollux
on the Coretex-M7 including the boards standard pinmuxing.

Signed-off-by: Peter Fecher <p.fecher@phytec.de>
2025-06-24 09:13:04 +02:00
Peter Fecher
f559f588da dts: nxp_imx8ml_m7: Add i2c Devicetree nodes
Add i2c DeviceTree nodes for use with the
Coretex M7 on the NXP imx8ml.

Signed-off-by: Peter Fecher <p.fecher@phytec.de>
2025-06-24 09:13:04 +02:00
Jonny Gellhaar
99957e1fb3 drivers: pinctrl: silabs: Fix multiple analogue bus allocation on same port
Fix ABUS allocation if both EVEN and ODD busses are used for the
same port. The initialisation loop would incorrectly overwrite
entire GPIO_nBUSALLOC when iterating the pinctrl array, must do
a read/mask/update/write sequence.

Signed-off-by: Jonny Gellhaar <jonny.gellhaar@prevas.se>
2025-06-23 16:31:40 -05:00
Benjamin Cabé
533fcc9a3f drivers: wifi: update non-inclusive language
use "Accept/block List" terminology instead of white/black list

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-23 16:31:16 -05:00
Benjamin Cabé
13ec1ea3dd Bluetooth: controller: update non-inclusive language
use "Accept List" terminology instead of white list

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-23 16:31:16 -05:00