Transition nrf54h away from the soc specific gpd
(global power domain) driver which mixed power domains, pinctrl
and gpio pin retention into a non scalable solution, forcing soc
specific logic to bleed into nrf drivers.
The new solution uses zephyrs PM_DEVICE based power domains to
properly model the hardware layout of device and pin power domains,
and moves pin retention logic out of drivers into pinctrl and
gpio, which are the components which manage pins (pads).
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Fix condition in which alarm stops working after a certain amount
of time. Hardware timer is 54-bit, yet it is treated as 32-bit by
the counter driver. To allow alarm event by hardware comparators,
counter high word must be loaded into the register along with
the lower word managed by the driver.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Previously, the CMSDK APB dual timer driver hardcoded the counter
clock frequency to 24 MHz, which limits reuse across SoCs and
boards with different timer clock sources.
This patch replaces the hardcoded frequency with a value derived
from the device tree's `clocks` phandle, using the
`clock-frequency` property of the referenced clock controller node.
If the property is missing, it falls back to a default 24 MHz.
Signed-off-by: Lidor T <lidor@exibit-iot.com>
Restructured counter and timer.
CTimer/Timer is now parent to pwm and counter.
Created PWM driver and tied to pwm and pwm-led
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
Previously, the CMSDK APB timer driver hardcoded the
counter clock frequency to 24 MHz, which limits reuse
across SoCs and boards with different timer clock
sources.
This patch replaces the hardcoded frequency with a value
derived from the device tree's `clocks` phandle, using
the `clock-frequency` property of the referenced clock
controller node. If the property is missing, it falls
back to a default 24 MHz and issues a build-time
warning.
Signed-off-by: Lidor T <lidor@exibit-iot.com>
There was an unnecessary nested `if` in `ifx_cat1_counter_init` with the
same condition already checked in the outer block.
This results in dead and redundant code with no functional impact but
harms readability.
The inner `if (rslt != CY_RSLT_SUCCESS)` was removed to clean up the
function.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
The function counter_rz_gtm_set_alarm was accessing alarm_cfg->flags and
alarm_cfg->ticks before verifying that alarm_cfg is non-NULL.
This could lead to undefined behavior or crashes if a NULL pointer is
passed.
The pointer check has been moved before any dereference to fix this bug.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Add missing backup domain access requests in STM32 RTC counter
driver that are needed to modify RTC registers.
Remove backup domain access requests in rtc_stm32_read() since this
function only reads RTC registers and backup domain access protection
protects RTC registers against write accesses only.
Fixes issue 92511.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Use recently added SoCs functions to request access to SoC backup
domain resources These function use a reference counter to track these
request and ensure the resources are accessible as long as at least a
consumer requires access. When we're done accessing RTC registers and
other protected resource, release the access refcount.
By the way, simplify rtc_stm32_read() when COUNTER_NO_DATE is defined
that used a useless extra local variable.
By the way, correct stm32_hsem.h header file inclusion that requires
brackets (<>) delimiters, not double quotes, as per convention header
location.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
CLOCK_CONTROL is required for fast instances of UART and COUNTER,
help select it when possible. The fast instances are UARTE120,
TIMER120 and TIMER121, and CLOCK_CONTROL is not supported for
CPUFLPR and CPUPPR even when the fast instances are used.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
1.correct timer register control flow
2.select timer interrupt rising edge trigger, instead of default
level trigger
Stress test: top timer fires interrupt every 300ms for 18 hours.
The result is that we don't lose any interrupts.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Currently there is a mismatch between the naming of the hardware and
the drivers targetting the hardware. nrf2_ is used instead of
the actual bindings names, like nrf2_audiopll instead of
nrfs_audiopll. This makes it hard to map drivers to the hardware
they are targetting.
There is historical reason for some of this, namely the same binding
name was used for different hardware, which is why nrf2_ was used
on newer platforms. This is no longer the case though, so drivers
and configs can be named according to the hardware without conflict.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
TI MSPM0 SoC series has General Purpose Timer and Advanced control timers
with Counting module, Capture block (measure input signal period/time) and
Compare block (to generate time expiry, output waveform like PWM).
Add a support for counter driver with alarm and counter top functions.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
User callback can be used to re-trigger the alarm.
In such case, copy current callback before it is overritten.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Migrate renesas,ra-agt-counter implementation to use hal_renesas.
Add additional AGT_CLOCK_SUBCLOCK count source.
Add constraint for counter resolution to 32 or 16 bit variant.
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Add support for cc23x0 RTC driver in counter.
RTC is always ON after device boot. Timer is restared only
on POR, and is active during STANDBY and ACTIVE power states.
Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Add missing curly braces in if/while/for statements.
This is a style guideline we have that was not enforced in CI. All
issues fixed here were detected by sonarqube SCA.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Don't use the same name for the structure instance and type.
As that is a violation of MISRA-C 2012 rule 5.7.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This PR adds a new devicetree property
that allows enabling external battery
backup functionality.
Signed-off-by: Marcin Lyda <elektromarcin@gmail.com>
Add a workaround for NRF52 anomaly 78: "High current consumption when
using timer STOP task only". Use the SHUTDOWN task instead.
For consistency, CLEAR the timer timer after STOPPING on devices that
lack the SHUTDOWN task. This also aligns the behavior with
nrfx_timer_disable().
For devices with the SHUTDOWN task, this restores the behavior previous
to e92323f.
Fixes#87224
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
The IT8xxx2 timer driver uses timer 7 and timer 8 to implement the alarm
timer and the top timer, respectively.
Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
