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drivers: counter: introduce counter node in esp32 timers

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Add counter device tree node to the esp32 timers.

Signed-off-by: Joel Guittet <joelguittet@gmail.com>
This commit is contained in:
Joel Guittet 2025-05-21 21:43:11 +02:00 committed by Benjamin Cabé
parent 46f7313db1
commit 9d4530fb79
9 changed files with 106 additions and 11 deletions
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22
drivers/counter/counter_esp32_tmr.c
View File

@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT espressif_esp32_timer
#define DT_DRV_COMPAT espressif_esp32_counter
#include <esp_clk_tree.h>
#include <driver/timer_types_legacy.h>
@ -360,10 +360,12 @@ static void counter_esp32_isr(void *arg)
timer_ll_clear_intr_status(data->hal_ctx.dev, TIMER_LL_EVENT_ALARM(data->hal_ctx.timer_id));
}
#define TIMER(idx) DT_INST_PARENT(idx)
#define ESP32_COUNTER_GET_CLK_DIV(idx) \
(((DT_INST_PROP(idx, prescaler) & UINT16_MAX) < 2) \
(((DT_PROP(TIMER(idx), prescaler) & UINT16_MAX) < 2) \
? 2 \
: (DT_INST_PROP(idx, prescaler) & UINT16_MAX))
: (DT_PROP(TIMER(idx), prescaler) & UINT16_MAX))
#define ESP32_COUNTER_INIT(idx) \
\
@ -382,13 +384,13 @@ static void counter_esp32_isr(void *arg)
.auto_reload = TIMER_AUTORELOAD_DIS, \
.divider = ESP32_COUNTER_GET_CLK_DIV(idx), \
}, \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \
.clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(idx, offset), \
.group = DT_INST_PROP(idx, group), \
.index = DT_INST_PROP(idx, index), \
.irq_source = DT_INST_IRQ_BY_IDX(idx, 0, irq), \
.irq_priority = DT_INST_IRQ_BY_IDX(idx, 0, priority), \
.irq_flags = DT_INST_IRQ_BY_IDX(idx, 0, flags)}; \
.clock_dev = DEVICE_DT_GET(DT_CLOCKS_CTLR(TIMER(idx))), \
.clock_subsys = (clock_control_subsys_t)DT_CLOCKS_CELL(TIMER(idx), offset), \
.group = DT_PROP(TIMER(idx), group), \
.index = DT_PROP(TIMER(idx), index), \
.irq_source = DT_IRQ_BY_IDX(TIMER(idx), 0, irq), \
.irq_priority = DT_IRQ_BY_IDX(TIMER(idx), 0, priority), \
.irq_flags = DT_IRQ_BY_IDX(TIMER(idx), 0, flags)}; \
\
DEVICE_DT_INST_DEFINE(idx, counter_esp32_init, NULL, &counter_data_##idx, \
&counter_config_##idx, PRE_KERNEL_1, CONFIG_COUNTER_INIT_PRIORITY, \

8
dts/bindings/counter/espressif,esp32-counter.yaml Normal file
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@ -0,0 +1,8 @@
# Copyright (c) 2025 Joel Guittet
# SPDX-License-Identifier: Apache-2.0
description: ESP32 counters
compatible: "espressif,esp32-counter"
include: base.yaml

5
dts/riscv/espressif/esp32c2/esp32c2_common.dtsi
View File

@ -181,6 +181,11 @@
interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
trng0: trng@3ff700b0 {

10
dts/riscv/espressif/esp32c3/esp32c3_common.dtsi
View File

@ -237,6 +237,11 @@
interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer1: counter@60020000 {
@ -248,6 +253,11 @@
interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
trng0: trng@3ff700b0 {

10
dts/riscv/espressif/esp32c6/esp32c6_common.dtsi
View File

@ -118,6 +118,11 @@
interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer1: counter@60009000 {
@ -129,6 +134,11 @@
interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
rtc: rtc@600b0000 {

20
dts/xtensa/espressif/esp32/esp32_common.dtsi
View File

@ -452,6 +452,11 @@
interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer1: counter@3ff5f024 {
@ -463,6 +468,11 @@
interrupts = <TG0_T1_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer2: counter@3ff60000 {
@ -474,6 +484,11 @@
interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer3: counter@3ff60024 {
@ -485,6 +500,11 @@
interrupts = <TG1_T1_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
dac: dac@3ff48800 {

20
dts/xtensa/espressif/esp32s2/esp32s2_common.dtsi
View File

@ -280,6 +280,11 @@
interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer1: counter@3f41f024 {
@ -291,6 +296,11 @@
interrupts = <TG0_T1_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer2: counter@3f420000 {
@ -302,6 +312,11 @@
interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer3: counter@3f420024 {
@ -312,6 +327,11 @@
index = <1>;
interrupts = <TG1_T1_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
trng0: trng@3f435110 {

20
dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi
View File

@ -415,6 +415,11 @@
interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer1: counter@6001f024 {
@ -426,6 +431,11 @@
interrupts = <TG0_T1_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer2: counter@60020000 {
@ -437,6 +447,11 @@
interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer3: counter@60020024 {
@ -447,6 +462,11 @@
index = <1>;
interrupts = <TG1_T1_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
wdt0: watchdog@6001f048 {

2
tests/drivers/counter/counter_basic_api/src/test_counter.c
View File

@ -103,7 +103,7 @@ static const struct device *const devices[] = {
DEVS_FOR_DT_COMPAT(xlnx_xps_timer_1_00_a)
#endif
#ifdef CONFIG_COUNTER_TMR_ESP32
DEVS_FOR_DT_COMPAT(espressif_esp32_timer)
DEVS_FOR_DT_COMPAT(espressif_esp32_counter)
#endif
#ifdef CONFIG_COUNTER_NXP_S32_SYS_TIMER
DEVS_FOR_DT_COMPAT(nxp_s32_sys_timer)