dba69f3f14
The DT hierachy of the RT11xx series was somewhat incoherent. The boards targets were directly including the series level DTSI with no SOC dtsi in between, and there existed an SOC DTSI that had to be separately included by a different board file, which didn't include the series DTSI itself. It seems that this was only working if you included the files exactly in the correct order in specific board files. Also, as a result of this change, need to (correctly) define the cpu core only in the DTSI for that core, instead of in the series generic dtsi, because that DTSI was actually written with incorrect syntax due to duplicated node labels on nodes right next to each other in the same file, and was relying on other DTSI files to delete the duplicate nodes in order for it to build. So overall this was a mess, needed cleanup. Signed-off-by: Declan Snyder <declan.snyder@nxp.com> |
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| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| posix | ||
| riscv | ||
| rx/renesas | ||
| sparc/gaisler | ||
| vendor | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||