Andrey Borisovich aa253d9ab1 soc: intel_adsp: reading HP SRAM banks count for ACE1X from Devicetree ... Replaced hardcoded for intel_adsp_ace15_mtpm board HP_MEMORY_BANKS value used in SOF code with generic approach - using PLATFORM_HPSRAM_EBB_COUNT read from Devicetree. Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>		2022-07-06 15:11:07 -04:00
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intel_adsp_ace15_mtpm.conf	soc: intel_adsp: reading HP SRAM banks count for ACE1X from Devicetree	2022-07-06 15:11:07 -04:00
intel_adsp_cavs15.conf	boards: xtensa: intel_adsp_cavs15: force COMP_SRC_TINY	2021-10-13 08:34:51 -04:00
intel_adsp_cavs18.conf
intel_adsp_cavs20_jsl.conf	soc/intel_adsp: add support for Intel Jasper Lake	2022-03-10 09:26:41 -06:00
intel_adsp_cavs20.conf
intel_adsp_cavs25_tgph.conf	soc/intel_adsp: add intel_adsp_cavs25_tgph board	2022-02-25 14:28:45 -06:00
intel_adsp_cavs25.conf	samples/subsys/audio/sof: fix rimage signing schema for cavs2.5	2022-02-25 14:28:45 -06:00
nxp_adsp_imx8.conf
nxp_adsp_imx8m.conf	samples/subsys/audio/sof: add configuration for imx8m board	2021-10-20 19:08:50 -04:00
nxp_adsp_imx8x.conf