zephyr/arch/xtensa
Flavio Ceolin f3bec2ffee xtensa: tls: Fix invalid reference
bsa is not defined. It should be access through frame pointer.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-05-11 17:38:16 -04:00
..
core xtensa: tls: Fix invalid reference 2023-05-11 17:38:16 -04:00
include arch/xtensa: Fix nested interrupt entry 2023-05-08 16:56:17 -04:00
CMakeLists.txt
Kconfig xtensa: make xtensa cache/uncache operations optional 2022-08-26 13:17:02 -04:00