43ef398614
Add soc power management for the STM32F4x chips. One low power state is added supported by all chips from the family - the Stop mode with voltage regulator in low-power mode. The Stop mode for STM32F chips has to work with the IDLE timer - CORTEX_M_SYSTICK_IDLE_TIMER, because PLL and HSI are disabled in the Stop mode (Systick is not clocked). The only possible wakeup source is RTC, which works as a IDLE timer for the Systick. The exit latency may need to be adjusted per system, depending on the system tick frequency and other variables. Signed-off-by: Dawid Niedzwiecki <dawidn@google.com> |
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| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||