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imx93: change ccm driver to "imx-ccm-rev2"

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i.MX93 share similiar register layout with i.MX RT11xx. Change ccm driver
to align with i.MX RT11xx, and make it easier to enable other drivers.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
This commit is contained in:
Chekhov Ma 2023-11-10 11:21:08 +08:00 committed by Mahesh Mahadevan
parent 85888c673d
commit 4e99da8599
3 changed files with 11 additions and 8 deletions
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9
drivers/clock_control/clock_control_mcux_ccm_rev2.c
View File

@ -6,7 +6,6 @@
#define DT_DRV_COMPAT nxp_imx_ccm_rev2
#include <errno.h>
#include <soc.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
#include <fsl_clock.h>
@ -31,7 +30,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
clock_control_subsys_t sub_system,
uint32_t *rate)
{
uint32_t clock_name = (uint32_t) sub_system;
uint32_t clock_name = (size_t) sub_system;
uint32_t clock_root, peripheral, instance;
peripheral = (clock_name & IMX_CCM_PERIPHERAL_MASK);
@ -51,6 +50,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
#ifdef CONFIG_UART_MCUX_LPUART
case IMX_CCM_LPUART1_CLK:
case IMX_CCM_LPUART2_CLK:
clock_root = kCLOCK_Root_Lpuart1 + instance;
break;
#endif
@ -106,8 +106,11 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
default:
return -EINVAL;
}
#ifdef CONFIG_SOC_MIMX93_A55
*rate = CLOCK_GetIpFreq(clock_root);
#else
*rate = CLOCK_GetRootClockFreq(clock_root);
#endif
return 0;
}

8
dts/arm64/nxp/nxp_mimx93_a55.dtsi
View File

@ -7,7 +7,7 @@
#include <mem.h>
#include <freq.h>
#include <arm64/armv8-a.dtsi>
#include <zephyr/dt-bindings/clock/imx_ccm.h>
#include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
/ {
@ -70,7 +70,7 @@
};
ccm: ccm@44450000 {
compatible = "nxp,imx-ccm";
compatible = "nxp,imx-ccm-rev2";
reg = <0x44450000 DT_SIZE_K(64)>;
#clock-cells = <3>;
};
@ -81,7 +81,7 @@
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-names = "irq_0";
interrupt-parent = <&gic>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x6c 24>;
clocks = <&ccm IMX_CCM_LPUART1_CLK 0x6c 24>;
status = "disabled";
};
@ -91,7 +91,7 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-names = "irq_0";
interrupt-parent = <&gic>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x6c 24>;
clocks = <&ccm IMX_CCM_LPUART2_CLK 0x6c 24>;
status = "disabled";
};
};

2
soc/arm64/nxp_imx/mimx9/Kconfig.soc
View File

@ -11,7 +11,7 @@ config SOC_MIMX93_A55
select CPU_CORTEX_A55
select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
select HAS_MCUX if CLOCK_CONTROL
select HAS_MCUX_CCM if CLOCK_CONTROL
select HAS_MCUX_CCM_REV2 if CLOCK_CONTROL
select HAS_MCUX_IOMUXC if PINCTRL
endchoice