From 4e99da8599616eff73de2bce9f7cae56838aa858 Mon Sep 17 00:00:00 2001
From: Chekhov Ma <chekhov.ma@nxp.com>
Date: Fri, 10 Nov 2023 11:21:08 +0800
Subject: [PATCH] imx93: change ccm driver to "imx-ccm-rev2"

i.MX93 share similiar register layout with i.MX RT11xx. Change ccm driver
to align with i.MX RT11xx, and make it easier to enable other drivers.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
---
 drivers/clock_control/clock_control_mcux_ccm_rev2.c | 9 ++++++---
 dts/arm64/nxp/nxp_mimx93_a55.dtsi                   | 8 ++++----
 soc/arm64/nxp_imx/mimx9/Kconfig.soc                 | 2 +-
 3 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/clock_control/clock_control_mcux_ccm_rev2.c b/drivers/clock_control/clock_control_mcux_ccm_rev2.c
index 626402d73df..9a88a36823a 100644
--- a/drivers/clock_control/clock_control_mcux_ccm_rev2.c
+++ b/drivers/clock_control/clock_control_mcux_ccm_rev2.c
@@ -6,7 +6,6 @@
 
 #define DT_DRV_COMPAT nxp_imx_ccm_rev2
 #include <errno.h>
-#include <soc.h>
 #include <zephyr/drivers/clock_control.h>
 #include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
 #include <fsl_clock.h>
@@ -31,7 +30,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
 					clock_control_subsys_t sub_system,
 					uint32_t *rate)
 {
-	uint32_t clock_name = (uint32_t) sub_system;
+	uint32_t clock_name = (size_t) sub_system;
 	uint32_t clock_root, peripheral, instance;
 
 	peripheral = (clock_name & IMX_CCM_PERIPHERAL_MASK);
@@ -51,6 +50,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
 
 #ifdef CONFIG_UART_MCUX_LPUART
 	case IMX_CCM_LPUART1_CLK:
+	case IMX_CCM_LPUART2_CLK:
 		clock_root = kCLOCK_Root_Lpuart1 + instance;
 		break;
 #endif
@@ -106,8 +106,11 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
 	default:
 		return -EINVAL;
 	}
-
+#ifdef CONFIG_SOC_MIMX93_A55
+	*rate = CLOCK_GetIpFreq(clock_root);
+#else
 	*rate = CLOCK_GetRootClockFreq(clock_root);
+#endif
 	return 0;
 }
 
diff --git a/dts/arm64/nxp/nxp_mimx93_a55.dtsi b/dts/arm64/nxp/nxp_mimx93_a55.dtsi
index e064233e46f..22a61e2dfca 100644
--- a/dts/arm64/nxp/nxp_mimx93_a55.dtsi
+++ b/dts/arm64/nxp/nxp_mimx93_a55.dtsi
@@ -7,7 +7,7 @@
 #include <mem.h>
 #include <freq.h>
 #include <arm64/armv8-a.dtsi>
-#include <zephyr/dt-bindings/clock/imx_ccm.h>
+#include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
@@ -70,7 +70,7 @@
 	};
 
 	ccm: ccm@44450000 {
-		compatible = "nxp,imx-ccm";
+		compatible = "nxp,imx-ccm-rev2";
 		reg = <0x44450000 DT_SIZE_K(64)>;
 		#clock-cells = <3>;
 	};
@@ -81,7 +81,7 @@
 		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
 		interrupt-names = "irq_0";
 		interrupt-parent = <&gic>;
-		clocks = <&ccm IMX_CCM_LPUART_CLK 0x6c 24>;
+		clocks = <&ccm IMX_CCM_LPUART1_CLK 0x6c 24>;
 		status = "disabled";
 	};
 
@@ -91,7 +91,7 @@
 		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
 		interrupt-names = "irq_0";
 		interrupt-parent = <&gic>;
-		clocks = <&ccm IMX_CCM_LPUART_CLK 0x6c 24>;
+		clocks = <&ccm IMX_CCM_LPUART2_CLK 0x6c 24>;
 		status = "disabled";
 	};
 };
diff --git a/soc/arm64/nxp_imx/mimx9/Kconfig.soc b/soc/arm64/nxp_imx/mimx9/Kconfig.soc
index 01ba9896874..3f38d40131f 100644
--- a/soc/arm64/nxp_imx/mimx9/Kconfig.soc
+++ b/soc/arm64/nxp_imx/mimx9/Kconfig.soc
@@ -11,7 +11,7 @@ config SOC_MIMX93_A55
 	select CPU_CORTEX_A55
 	select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
 	select HAS_MCUX if CLOCK_CONTROL
-	select HAS_MCUX_CCM if CLOCK_CONTROL
+	select HAS_MCUX_CCM_REV2 if CLOCK_CONTROL
 	select HAS_MCUX_IOMUXC if PINCTRL
 
 endchoice