7f74825958
This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board. Memory is tight so a few tests had to be disabled due to the extra memory usage compared to qemu_riscv32. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
7 lines
183 B
YAML
7 lines
183 B
YAML
tests:
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logging.log_core:
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tags: log_core logging
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platform_exclude: nucleo_l053r8 nucleo_f030r8
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stm32f0_disco native_posix native_posix_64 nrf52_bsim
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qemu_riscv64
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