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zephyr/tests/subsys/logging/log_core
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Nicolas Pitre 7f74825958 riscv: add a qemu_riscv64 board 
This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board.
Memory is tight so a few tests had to be disabled due to the extra
memory usage compared to qemu_riscv32.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-09 09:11:45 -05:00
..
src tests: subsys: logging: Test for detection of missed log_strdup 2019-05-29 13:52:31 +02:00
CMakeLists.txt license: cleanup: add SPDX Apache-2.0 license identifier 2019-04-07 08:45:22 -04:00
prj.conf tests: subsys: logging: Test for detection of missed log_strdup 2019-05-29 13:52:31 +02:00
testcase.yaml riscv: add a qemu_riscv64 board 2019-08-09 09:11:45 -05:00