017a8eea4f
The atomic_cas function was using incorrect register when determining whether value was swapped. The swapping instruction s32c1i in atomic_cas stores the value at memory location in register a4 regardless of whether swapping is done. In this case, the register a4 should be used to determine whether a swap is done. However, register a3 (containing the oldValue as function argument) is used instead. Since register a5 contains the old value at address loaded before the swapping instruction, a3 and a5 contain the same value. Since a3 == a5 is always true in this case, the function will always return 1 even though values are not swapped. So fix it by using the correct register. Also, in case the value is not swapped, it jumps to where it returns zero instead of loading from memory and comparing again. The function was simply looping until swapping was done, which did not align with the API where it would return 0 when swapping is not done (regardless whether the memory location contains the old value or not). Signed-off-by: Daniel Leung <daniel.leung@intel.com>
406 lines
9.2 KiB
ArmAsm
406 lines
9.2 KiB
ArmAsm
/*
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* Copyright (c) 2016 Cadence Design Systems, Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arch/xtensa/xtensa_context.h>
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/**
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*
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* @brief Atomically clear a memory location
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*
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* This routine atomically clears the contents of <target> and returns the old
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* value that was in <target>.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_clear
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* (
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* atomic_t *target /@ memory location to clear @/
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* )
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*/
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.global atomic_clear
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.type atomic_clear,@function
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.align 4
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atomic_clear:
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ENTRY(48)
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movi a4, 0
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.L_LoopClear:
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l32ai a3, a2, 0
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wsr a3, scompare1
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s32c1i a4, a2, 0
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bne a3, a4, .L_LoopClear
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mov a2, a3
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RET(48)
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/**
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*
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* @brief Atomically set a memory location
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*
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* This routine atomically sets the contents of <target> to <value> and returns
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* the old value that was in <target>.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_set
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* (
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* atomic_t *target, /@ memory location to set @/
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* atomic_val_t value /@ set with this value @/
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* )
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*
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*/
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.global atomic_set
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.type atomic_set,@function
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.align 4
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atomic_set:
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ENTRY(48)
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.L_LoopSet:
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l32ai a4, a2, 0
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wsr a4, scompare1
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s32c1i a3, a2, 0
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bne a3, a4, .L_LoopSet
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mov a2, a3
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RET(48)
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/**
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*
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* @brief Get the value of a shared memory atomically
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*
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* This routine atomically retrieves the value in *target
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*
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* long atomic_get
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* (
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* atomic_t * target /@ address of atom to be retrieved @/
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* )
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*
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* @return value read from address target.
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*
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*/
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.global atomic_get
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.type atomic_get,@function
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.align 4
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atomic_get:
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ENTRY(48)
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l32ai a2, a2, 0
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RET(48)
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/**
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*
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* @brief Atomically increment a memory location
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*
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* This routine atomically increments the value in <target>. The operation is
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* done using unsigned integer arithmetic. Various CPU architectures may
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* impose restrictions with regards to the alignment and cache attributes of
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* the atomic_t type.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_inc
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* (
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* atomic_t *target, /@ memory location to increment @/
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* )
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*
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*/
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.global atomic_inc
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.type atomic_inc,@function
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.align 4
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atomic_inc:
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ENTRY(48)
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.L_LoopInc:
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l32ai a3, a2, 0
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wsr a3, scompare1
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addi a4, a3, 1
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s32c1i a4, a2, 0
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bne a3, a4, .L_LoopInc
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mov a2, a3
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RET(48)
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/**
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*
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* @brief Atomically add a value to a memory location
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*
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* This routine atomically adds the contents of <target> and <value>, placing
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* the result in <target>. The operation is done using signed integer
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* arithmetic. Various CPU architectures may impose restrictions with regards
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* to the alignment and cache attributes of the atomic_t type.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_add
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* (
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* atomic_t *target, /@ memory location to add to @/
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* atomic_val_t value /@ value to add @/
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* )
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*/
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.global atomic_add
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.type atomic_add,@function
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.align 4
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atomic_add:
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ENTRY(48)
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.L_LoopAdd:
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l32ai a4, a2, 0
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wsr a4, scompare1
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add a5, a3, a4
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s32c1i a5, a2, 0
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bne a5, a4, .L_LoopAdd
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mov a2, a5
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RET(48)
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/**
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*
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* @brief Atomically decrement a memory location
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*
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* This routine atomically decrements the value in <target>. The operation is
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* done using unsigned integer arithmetic. Various CPU architectures may impose
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* restrictions with regards to the alignment and cache attributes of the
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* atomic_t type.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_dec
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* (
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* atomic_t *target, /@ memory location to decrement @/
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* )
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*
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*/
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.global atomic_dec
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.type atomic_dec,@function
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.align 4
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atomic_dec:
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ENTRY(48)
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.L_LoopDec:
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l32ai a3, a2, 0
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wsr a3, scompare1
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addi a4, a3, -1
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s32c1i a4, a2, 0
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bne a3, a4, .L_LoopDec
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mov a2, a3
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RET(48)
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/**
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*
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* @brief Atomically subtract a value from a memory location
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*
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* This routine atomically subtracts <value> from the contents of <target>,
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* placing the result in <target>. The operation is done using signed integer
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* arithmetic. Various CPU architectures may impose restrictions with regards to
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* the alignment and cache attributes of the atomic_t type.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_sub
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* (
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* atomic_t *target, /@ memory location to subtract from @/
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* atomic_val_t value /@ value to subtract @/
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* )
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*
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*/
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.global atomic_sub
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.type atomic_sub,@function
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.align 4
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atomic_sub:
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ENTRY(48)
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.L_LoopSub:
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l32ai a4, a2, 0
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wsr a4, scompare1
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sub a5, a4, a3
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s32c1i a5, a2, 0
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bne a5, a4, .L_LoopSub
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mov a2, a5
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RET(48)
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/**
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*
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* @brief Atomically perform a bitwise NAND on a memory location
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*
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* This routine atomically performs a bitwise NAND operation of the contents of
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* <target> and <value>, placing the result in <target>.
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* Various CPU architectures may impose restrictions with regards to the
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* alignment and cache attributes of the atomic_t type.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_nand
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* (
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* atomic_t *target, /@ memory location to NAND @/
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* atomic_val_t value /@ NAND with this value @/
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* )
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*
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*/
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.global atomic_nand
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.type atomic_nand,@function
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.align 4
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atomic_nand:
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ENTRY(48)
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.L_LoopNand:
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l32ai a4, a2, 0
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wsr a4, scompare1
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and a5, a3, a4
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neg a5, a5
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addi a5, a5, -1
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s32c1i a5, a2, 0
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bne a5, a4, .L_LoopNand
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mov a2, a4
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RET(48)
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/**
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*
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* @brief Atomically perform a bitwise AND on a memory location
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*
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* This routine atomically performs a bitwise AND operation of the contents of
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* <target> and <value>, placing the result in <target>.
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* Various CPU architectures may impose restrictions with regards to the
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* alignment and cache attributes of the atomic_t type.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_and
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* (
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* atomic_t *target, /@ memory location to AND @/
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* atomic_val_t value /@ AND with this value @/
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* )
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*
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*/
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.global atomic_and
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.type atomic_and,@function
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.align 4
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atomic_and:
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ENTRY(48)
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.L_LoopAnd:
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l32ai a4, a2, 0
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wsr a4, scompare1
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and a5, a3, a4
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s32c1i a5, a2, 0
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bne a5, a4, .L_LoopAnd
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mov a2, a4
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RET(48)
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/**
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*
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* @brief Atomically perform a bitwise OR on memory location
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*
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* This routine atomically performs a bitwise OR operation of the contents of
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* <target> and <value>, placing the result in <target>.
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* Various CPU architectures may impose restrictions with regards to the
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* alignment and cache attributes of the atomic_t type.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_or
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* (
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* atomic_t *target, /@ memory location to OR @/
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* atomic_val_t value /@ OR with this value @/
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* )
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*
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*/
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.global atomic_or
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.type atomic_or,@function
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.align 4
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atomic_or:
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ENTRY(48)
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.L_LoopOr:
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l32ai a4, a2, 0
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wsr a4, scompare1
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or a5, a3, a4
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s32c1i a5, a2, 0
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bne a4, a5, .L_LoopOr
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mov a2, a4
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RET(48)
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/**
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*
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* @brief Atomically perform a bitwise XOR on a memory location
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*
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* This routine atomically performs a bitwise XOR operation of the contents of
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* <target> and <value>, placing the result in <target>.
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* Various CPU architectures may impose restrictions with regards to the
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* alignment and cache attributes of the atomic_t type.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return Contents of <target> before the atomic operation
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*
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* atomic_val_t atomic_xor
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* (
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* atomic_t *target, /@ memory location to XOR @/
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* atomic_val_t value /@ XOR with this value @/
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* )
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*
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*/
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.global atomic_xor
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.type atomic_xor,@function
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.align 4
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atomic_xor:
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ENTRY(48)
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.L_LoopXor:
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l32ai a4, a2, 0
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wsr a4, scompare1
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xor a5, a3, a4
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s32c1i a5, a2, 0
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bne a5, a4, .L_LoopXor
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mov a2, a4
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RET(48)
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/**
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*
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* @brief Atomically compare-and-swap the contents of a memory location
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*
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* This routine performs an atomic compare-and-swap. testing that the contents
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* of <target> contains <oldValue>, and if it does, setting the value of
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* <target> to <newValue>. Various CPU architectures may impose restrictions
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* with regards to the alignment and cache attributes of the atomic_t type.
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*
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* This routine can be used from both task and interrupt level.
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*
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* @return 1 if the swap is actually executed, 0 otherwise.
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*
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* int atomic_cas
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* (
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* atomic_t *target, /@ memory location to compare-and-swap @/
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* atomic_val_t oldValue, /@ compare to this value @/
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* atomic_val_t newValue, /@ swap with this value @/
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* )
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*
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*/
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.global atomic_cas
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.type atomic_cas,@function
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.align 4
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atomic_cas:
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ENTRY(48)
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l32ai a5, a2, 0
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beq a5, a3, 2f
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1:
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movi a2, 0
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j 3f
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2:
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wsr a5, scompare1
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s32c1i a4, a2, 0
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bne a4, a5, 1b
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movi a2, 1
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3:
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RET(48)
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