zephyr/dts
Vitaliy Livnov e6894ad576 drivers: can: sam0: fix clock configuration for SAM0 series
Fixed a bug where unconfigured clocks were connected to the can
interface in the device tree for SAM0, causing the interface to work
incorrectly. Fixed by adding the correct index when calling GENCTRL.
Also, the default divider has been reduced to 6 to allow setting
the bitrate to 500 kbps.

Tested on a canopennode sample on a board with an ATSAMC21E18A
microcontroller.

Signed-off-by: Vitaliy Livnov <vitaliy.livnov@devkit.agency>
2025-07-10 15:53:46 -05:00
..
arc/synopsys
arm drivers: can: sam0: fix clock configuration for SAM0 series 2025-07-10 15:53:46 -05:00
arm64 dts: bindings: nxp,enet-mac: convert to use ptp-clock property 2025-06-27 09:54:21 -05:00
bindings doc: drivers: display: add basic controller info 2025-07-09 17:18:39 -05:00
common dts: Move vendor-specific dtsi to dedicated folder 2025-04-29 13:00:03 +02:00
posix
riscv soc: esp32c6: add BLE support 2025-06-27 18:27:15 -05:00
rx/renesas boards: renesas: Fix incorrect partnumber for RSK-RX130 2025-06-27 09:42:49 +02:00
sparc/gaisler
vendor soc: nrf: Add nRF54LM20A device 2025-06-27 18:26:57 -05:00
x86/intel edac: shell: Make more generic 2025-06-18 09:09:40 -04:00
xtensa drivers: clock_control: mcux_ccm: support QM/QXP's ESAI/AUD_PLL1 clocks 2025-06-24 09:13:45 +02:00
binding-template.yaml
Kconfig