Adds support for directed IPIs to x86/intel64. Use of direct IPIs can further reduce the number of schedule IPIs sent and processed in a system. Fewer IPI related ISRs mean that ... 1. Application code is interrupted less frequently 2. Lower likelihood of scheduler spinlock contention Signed-off-by: Peter Mitsis <peter.mitsis@intel.com> |
||
|---|---|---|
| .. | ||
| coredump.c | ||
| cpu.c | ||
| fatal.c | ||
| irq_offload.c | ||
| irq.c | ||
| locore.S | ||
| smp.c | ||
| thread.c | ||
| tls.c | ||
| userspace.S | ||