bartoszek/zephyr
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

kernel: arch: add directed IPIs to x86/intel64

Browse Source 
Adds support for directed IPIs to x86/intel64. Use of direct IPIs
can further reduce the number of schedule IPIs sent and processed
in a system. Fewer IPI related ISRs mean that ...
 1. Application code is interrupted less frequently
 2. Lower likelihood of scheduler spinlock contention

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
This commit is contained in:
Peter Mitsis 2025-01-13 10:04:24 -08:00 committed by Benjamin Cabé
parent d26396c556
commit 427f2c60da
3 changed files with 15 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/x86/Kconfig
View File

@ -83,6 +83,7 @@ config X86_64
select X86_MMX
select X86_SSE
select X86_SSE2
select ARCH_HAS_DIRECTED_IPIS
menu "x86 Features"

13
arch/x86/core/intel64/smp.c
View File

@ -38,3 +38,16 @@ void arch_sched_broadcast_ipi(void)
{
z_loapic_ipi(0, LOAPIC_ICR_IPI_OTHERS, CONFIG_SCHED_IPI_VECTOR);
}
void arch_sched_directed_ipi(uint32_t cpu_bitmap)
{
unsigned int num_cpus = arch_num_cpus();
for (unsigned int i = 0; i < num_cpus; i++) {
if ((cpu_bitmap & BIT(i)) == 0) {
continue;
}
z_loapic_ipi(i, LOAPIC_ICR_IPI_SPECIFIC, CONFIG_SCHED_IPI_VECTOR);
}
}

1
include/zephyr/drivers/interrupt_controller/loapic.h
View File

@ -43,6 +43,7 @@
#define LOAPIC_ICR_BUSY 0x00001000 /* delivery status: 1 = busy */
#define LOAPIC_ICR_IPI_SPECIFIC 0x00004000U /* target IPI to specific CPU */
#define LOAPIC_ICR_IPI_OTHERS 0x000C4000U /* normal IPI to other CPUs */
#define LOAPIC_ICR_IPI_INIT 0x00004500U
#define LOAPIC_ICR_IPI_STARTUP 0x00004600U