Without this patch the hdlc_iface_init() function assigns to
ot_hdlc_rcp_context structure pointer (*ctx) value of 0, as in the
NET_DEVICE_DT_INST_DEFINE() preprocessor macro the 'data' field is
set to NULL.
Afterwards, the ctx->iface is set to iface address passed to the function
(as well as the ctx->ot_context is set).
Writing those values to address 0x0 is catastrophic to for example
mimxrt1020, which uses ITCM memory (mapped from 0x0) to store flash
handling functions, as those are used to XIP code directly from
SPI NOR memory (as mximxrt1020 doesn't have internal flash).
In this particular case - the flash_flexspi_nor_erase() function is mapped
(i.e. relocated) to ITCM's 0x0 address. Overwriting first 8 bytes of it
causes the SoC to enter "Precise data bus error" exception.
The fix is to define the static instance of struct ot_hdlc_rcp_context
and pass its address to the NET_DEVICE_DT_INST_DEFINE() macro. As a result
its storage is now in RAM, not ITCM.
This issue has been discovered on UART based HDLC RCP communication, but as
it also may be problematic on the NXP driver, this patch fixes it too.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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