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drivers: memc_nxp_s32_qspi: add support for s32ze

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Add support QSPI secure flash protection (SFP)

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
This commit is contained in:
Cong Nguyen Huu 2024-08-13 14:21:38 +07:00 committed by Benjamin Cabé
parent a0d07078f0
commit e31d3645b4
5 changed files with 199 additions and 1 deletions
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77
drivers/memc/memc_nxp_s32_qspi.c
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@ -11,6 +11,7 @@ LOG_MODULE_REGISTER(nxp_s32_qspi_memc, CONFIG_MEMC_LOG_LEVEL);
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/sys/util.h>
#include <zephyr/dt-bindings/qspi/nxp-s32-qspi.h>
#include <soc.h>
#include "memc_nxp_s32_qspi.h"
@ -154,6 +155,81 @@ uint8_t memc_nxp_s32_qspi_get_instance(const struct device *dev)
QSPI_PORT_SIZE(n, side_upper) \
.readMode##side_upper = QSPI_READ_MODE(n, side, side_upper),
#if FEATURE_QSPI_HAS_SFP
#if QSPI_IP_SFP_ENABLE_MDAD
#define SFP_MDAD_NODE(n) DT_INST_CHILD(n, sfp_mdad)
#define QSPI_SECURE_ATTRIBUTE(node_id) \
(DT_PROP(node_id, secure_attribute) == NXP_S32_QSPI_NON_SECURE ? QSPI_IP_SFP_UNSECURE : \
(DT_PROP(node_id, secure_attribute) == NXP_S32_QSPI_SECURE ? QSPI_IP_SFP_SECURE : \
(DT_PROP(node_id, secure_attribute) == (NXP_S32_QSPI_NON_SECURE | NXP_S32_QSPI_SECURE) ?\
QSPI_IP_SFP_BOTH : \
QSPI_IP_SFP_RESERVED)))
#define _QSPI_SFP_MDAD_CFG(node_id, n) \
{ \
.SecureAttribute = QSPI_SECURE_ATTRIBUTE(node_id), \
.MaskType = DT_ENUM_IDX(node_id, mask_type), \
.Valid = true, \
.Mask = DT_PROP(node_id, mask), \
.DomainId = DT_PROP(node_id, domain_id), \
},
#define QSPI_SFP_MDAD_CFG(n) \
.Tg = { \
DT_FOREACH_CHILD_STATUS_OKAY_VARGS(SFP_MDAD_NODE(n), _QSPI_SFP_MDAD_CFG, n)\
},
#endif /* QSPI_IP_SFP_ENABLE_MDAD */
#if QSPI_IP_SFP_ENABLE_FRAD
#define SFP_FRAD_NODE(n) DT_INST_CHILD(n, sfp_frad)
#define QSPI_ACP_POLICY(node_id) \
(DT_PROP(node_id, master_domain_acp_policy) == NXP_S32_QSPI_SECURE ? \
QSPI_IP_SFP_ACP_SECURE :\
(DT_PROP(node_id, master_domain_acp_policy) == (NXP_S32_QSPI_NON_SECURE | \
NXP_S32_QSPI_PRIVILEGE) ? QSPI_IP_SFP_ACP_PRIVILEGED : \
(DT_PROP(node_id, master_domain_acp_policy) == (NXP_S32_QSPI_SECURE | \
NXP_S32_QSPI_PRIVILEGE) ? QSPI_IP_SFP_ACP_SECURE_PRIVILEGED :\
(DT_PROP(node_id, master_domain_acp_policy) == (NXP_S32_QSPI_NON_SECURE | \
NXP_S32_QSPI_SECURE | NXP_S32_QSPI_PRIVILEGE) ? QSPI_IP_SFP_ACP_ALL : \
QSPI_IP_SFP_ACP_NONE))))
#define QSPI_EXCLUSIVE_ACCESS_LOCK(node_id) \
(DT_ENUM_IDX(node_id, exclusive_access_lock) == 0 ? QSPI_IP_SFP_EAL_DISABLED : \
(DT_ENUM_IDX(node_id, exclusive_access_lock) == 1 ? QSPI_IP_SFP_EAL_OWNER : \
QSPI_IP_SFP_EAL_NONE))
#define _QSPI_SFP_FRAD_CFG(node_id, n) \
{ \
.StartAddress = DT_REG_ADDR(node_id), \
.EndAddress = DT_REG_ADDR(node_id) + DT_REG_SIZE(node_id) - 1, \
.Valid = true, \
.Md0Acp = QSPI_ACP_POLICY(node_id), \
.Md1Acp = QSPI_ACP_POLICY(node_id), \
.ExclusiveAccessLock = QSPI_EXCLUSIVE_ACCESS_LOCK(node_id), \
.ExclusiveAccessOwner = DT_PROP(node_id, exclusive_access_owner), \
},
#define QSPI_SFP_FRAD_CFG(n) \
.Frad = { \
DT_FOREACH_CHILD_STATUS_OKAY_VARGS(SFP_FRAD_NODE(n), _QSPI_SFP_FRAD_CFG, n)\
},
#endif /* QSPI_IP_SFP_ENABLE_FRAD */
#define QSPI_SFP_MASTER_TIMEOUT_CYCLES 0xffff
#define QSPI_SFP_CFG(n) \
IF_ENABLED(QSPI_IP_SFP_ENABLE_GLOBAL, \
(.SfpCfg = { \
.MasterTimeout = QSPI_SFP_MASTER_TIMEOUT_CYCLES, \
IF_ENABLED(QSPI_IP_SFP_ENABLE_MDAD, (QSPI_SFP_MDAD_CFG(n))) \
IF_ENABLED(QSPI_IP_SFP_ENABLE_FRAD, (QSPI_SFP_FRAD_CFG(n))) \
},))
#endif /* FEATURE_QSPI_HAS_SFP */
#define MEMC_NXP_S32_QSPI_CONTROLLER_CONFIG(n) \
BUILD_ASSERT(DT_INST_PROP_LEN(n, ahb_buffers_masters) == QSPI_IP_AHB_BUFFERS, \
"ahb-buffers-masters must be of size QSPI_IP_AHB_BUFFERS"); \
@ -174,6 +250,7 @@ uint8_t memc_nxp_s32_qspi_get_instance(const struct device *dev)
QSPI_DATA_CFG(n) \
QSPI_ADDR_CFG(n) \
QSPI_BYTES_SWAP_ADDR(n) \
IF_ENABLED(FEATURE_QSPI_HAS_SFP, (QSPI_SFP_CFG(n))) \
}
#define MEMC_NXP_S32_QSPI_INIT_DEVICE(n) \

53
dts/bindings/qspi/nxp,s32-qspi-sfp-frad.yaml Normal file
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@ -0,0 +1,53 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
description: NXP S32 Quad Serial Peripheral Interface (QSPI) Secure Flash Protection SFP FRAD.
The SFP FRAD performs second-level checks on input flash write and erase transactions,
based on the address range of each transaction.
compatible: "nxp,s32-qspi-sfp-frad"
child-binding:
properties:
reg:
type: array
required: true
master-domain-acp-policy:
type: int
required: true
description: |
Selects the master domain access control policy, defined in dt-bindings/qspi/nxp-s32-qspi.h:
- NXP_S32_QSPI_NON_SECURE: Selects the non-secure access control policy.
- NXP_S32_QSPI_SECURE: Selects the secure access control policy.
- NXP_S32_QSPI_PRIVILEGE: Selects the privilege access control policy.
Allowed combinations:
- NXP_S32_QSPI_SECURE
- NXP_S32_QSPI_SECURE | NXP_S32_QSPI_PRIVILEGE
- NXP_S32_QSPI_NON_SECURE | NXP_S32_QSPI_PRIVILEGE
- NXP_S32_QSPI_NON_SECURE | NXP_S32_QSPI_SECURE | NXP_S32_QSPI_PRIVILEGE
exclusive-access-lock:
type: string
enum:
- DISABLED
- OWNER
- NONE
default: DISABLED
description: |
Selects the exclusive access lock:
- DISABLED: The exclusive access lock disabled, granting write permissions for all masters
- ENABLED: The exclusive access lock enabled, granting write permissions only to the
exclusive access owner master and disabling write permissions for other masters.
- NONE: This configuration should not be used
The default corresponds to the reset value of the register field.
exclusive-access-owner:
type: int
default: 0
description: |
The domain master ID that owns the exclusive access lock.
Valid range: 0 - 63. The default corresponds to the reset
value of the register field.

51
dts/bindings/qspi/nxp,s32-qspi-sfp-mdad.yaml Normal file
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@ -0,0 +1,51 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
description: NXP S32 Quad Serial Peripheral Interface (QSPI) Secure Flash Protection SFP MDAD.
The SFP MDAD performs first-level checks on input transactions, based on the secure attribute
and MGID associated with each transaction.
compatible: "nxp,s32-qspi-sfp-mdad"
child-binding:
properties:
secure-attribute:
type: int
required: true
description: |
Selects the secure attribute, defined in dt-bindings/qspi/nxp-s32-qspi.h:
- NXP_S32_QSPI_NON_SECURE: Allow the bus attribute for this master to non-secure
- NXP_S32_QSPI_SECURE: Allow the bus attribute for this master to secure
Allowed combinations:
- NXP_S32_QSPI_NON_SECURE
- NXP_S32_QSPI_SECURE
- NXP_S32_QSPI_NON_SECURE | NXP_S32_QSPI_SECURE
mask-type:
type: string
enum:
- AND
- OR
default: AND
description: |
Selects the mask type:
- AND: AND-ed mask
- OR: OR-ed mask
The default corresponds to the reset value of the register field.
mask:
type: int
default: 0
description: |
Defines the mask value for the ID-Match comparison.
Valid range: 0 - 63. The default corresponds to the
reset value of the register field.
domain-id:
type: int
required: true
description: |
Domain ID Reference value of the Domain-ID (MID) for MID-comparison.
Valid range: 0 - 63.

17
include/zephyr/dt-bindings/qspi/nxp-s32-qspi.h Normal file
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@ -0,0 +1,17 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_NXP_S32_QSPI_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_NXP_S32_QSPI_H_
#include <zephyr/dt-bindings/dt-util.h>
/* The QSPI secure attribute and secure policy references */
#define NXP_S32_QSPI_NON_SECURE BIT(0)
#define NXP_S32_QSPI_SECURE BIT(1)
#define NXP_S32_QSPI_PRIVILEGE BIT(2)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_NXP_S32_QSPI_H_ */

2
west.yml
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@ -203,7 +203,7 @@ manifest:
groups:
- hal
- name: hal_nxp
revision: a7dc61f89063c1008f24ee21575c68d0165de91b
revision: 5576d444d203e8973f7e8f5be18263b3d8a7bb1f
path: modules/hal/nxp
groups:
- hal