1204aa25c8
the FIFO Rx need to have a Minimum memory to works distributed the rest of the ram_size memory between the different TX FIFOs except the first which is a control endtype with max data payload of 64 bytes Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com> |
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| .. | ||
| CMakeLists.txt | ||
| Kconfig | ||
| usb_dc_dw_stm32.h | ||
| usb_dc_dw.c | ||
| usb_dc_it82xx2.c | ||
| usb_dc_kinetis.c | ||
| usb_dc_mcux.c | ||
| usb_dc_native_posix_adapt.c | ||
| usb_dc_native_posix_adapt.h | ||
| usb_dc_native_posix.c | ||
| usb_dc_nrfx.c | ||
| usb_dc_rpi_pico.c | ||
| usb_dc_sam0.c | ||
| usb_dc_sam_usbc.c | ||
| usb_dc_sam_usbhs.c | ||
| usb_dc_smartbond.c | ||
| usb_dc_stm32.c | ||
| usb_dw_registers.h | ||