Yong Cong Sin e538b0e5a6 drivers: plic: support multiple instances for multi-level ... Most of the public APIs in `riscv_plic.h` (except `riscv_plic_get_irq` & `riscv_plic_get_dev`) expect the `irq` argument to be in Zephyr-encoded format, instead of the previously `irq_from_level_2`-stripped version. The first level IRQ is needed by `intc_plic` to differentiate between the parent interrupt controllers, so that correct ISR offset can be obtained using the LUT in `sw_isr_common`. Signed-off-by: Yong Cong Sin <ycsin@meta.com>		2023-11-09 18:20:43 +01:00
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espressif_esp32	cmake: riscv: update riscv SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
litex-vexriscv	cmake: riscv: update riscv SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
openisa_rv32m1	cmake: riscv: update riscv SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
riscv-ite	ITE: drivers/i2c: Add a property for I2C located channel	2023-11-08 10:08:28 +01:00
riscv-privileged	drivers: plic: support multiple instances for multi-level	2023-11-09 18:20:43 +01:00
CMakeLists.txt