Laurentiu Mihalcea 1f483b37ea drivers: clock_control: mcux_ccm: support QM/QXP's ESAI/AUD_PLL1 clocks ... Add support for gating/ungating IMX8QM/IMX8QXP's ESAI clocks and the AUD_PLL_DIV_CLK0 clock used as source for ESAI's EXTAL. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>		2025-06-24 09:13:45 +02:00
..
amd	soc: amd: acp_6_0: add support for AMD ACP_6_0 soc.	2024-11-19 17:53:11 -05:00
espressif	soc: espressif: convert rtc peripheral to clock subsystem	2025-06-02 17:38:08 +02:00
intel	dts: intel_adsp_ace30: merge and cleanup ace30 dtsi files	2025-05-15 22:14:44 +02:00
nxp	drivers: clock_control: mcux_ccm: support QM/QXP's ESAI/AUD_PLL1 clocks	2025-06-24 09:13:45 +02:00
dc233c.dtsi	xtensa: dc233c: Fix build warning in DTS on leading zeros	2024-04-03 20:41:45 -04:00
sample_controller32.dtsi	soc: xtensa: add sample_controller32	2024-10-02 09:58:36 +02:00
sample_controller.dtsi
xtensa.dtsi