07de2ffbb0
The thread swap test was making use of a register to point to ztest_thread_callee_saved_regs_container, which was being clobbered in the inline assembly code, causing a hard-fault in certain cases. This commit adds a clobber list of the registers used, causing the compiler to assign ztest_thread_callee_saved_regs_container to an appropriate (unclobbered) register. It also addresses an issue in the v6-m and v8-m.baseline inline assembler where only 4 of the 8 callee-saved registers were being set from ztest_thread_callee_saved_regs_container, due to a double use of `ldmia` on the same four registers. Since v6-m devices can't operate outside r0-r7 on most instructions, the upper 4 callee-saved registers are set first with `ldmia`, before setting the lower 4. Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org> |
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| .. | ||
| arm_hardfault_validation | ||
| arm_interrupt | ||
| arm_irq_advanced_features | ||
| arm_irq_vector_table | ||
| arm_irq_zero_latency_levels | ||
| arm_mem_protect | ||
| arm_no_multithreading | ||
| arm_ramfunc | ||
| arm_runtime_nmi | ||
| arm_sw_vector_relay | ||
| arm_thread_swap | ||
| arm_thread_swap_tz | ||
| arm_tz_wrap_func | ||