dabe728eef
Add support for the Xilinx GEM Ethernet controller, which is integrated in both the Xilinx Zynq and ZynqMP (UltraScale) SoC families. The driver supports the management of a PHY attached to the respective GEM's MDIO interface. This driver was developed with ultimately the Zynq-7000 series in mind, but at the time being, it is limited to use in conjunction with the ZynqMP RPU (Cortex-R5) cores. The differences are minor when it comes to the adjustment of the TX clock frequency derived from the current link speed reported by the PHY, but for use in conjunction with the Zynq-7000, some larger adjustments will have to be made when it comes to the placement of the DMA memory area, as this involves the confi- guration of the MMU in Cortex-A CPUs. The driver was developed under the qemu_cortex_r5 target. The Marvell 88E1111 PHY simulated by QEMU is supported by the driver. Limitations currently exist when it comes to timestamping or VLAN support and other minor things. Those haven't been implemented yet, although they are supported by the hardware. In order to be fully supported by the ZynqMP APU, 64-bit DMA address descriptor format support will be added. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com> |
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|---|---|---|
| .. | ||
| adc | ||
| clock | ||
| dac | ||
| display | ||
| dma | ||
| espi | ||
| ethernet | ||
| gpio | ||
| i2c | ||
| interrupt-controller | ||
| led | ||
| lora | ||
| memory-controller | ||
| pcie | ||
| pinctrl | ||
| pwm | ||
| rdc | ||
| sensor | ||
| usb | ||
| dt-util.h | ||