dbb8ee38f2
Add driver for Microchip PolarFire SoC (MPFS) peripheral clock and soft
reset control.
Normally, the peripheral clocks and reset state are controlled by the
Hart Software Services (HSS) running on the Monitor processor. As an
alternative to using HSS services, applications can now enable the reset
controller in a device tree overly, for example:
&reset {
status = "okay";
};
&uart4 {
resets = <&reset MSS_RESET_ID_MMUART4>;
};
Embedded the reset controller node in system controller node.
Signed-off-by: Frank Kühndel <frank.kuehndel@embedded-brains.de>
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
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| .. | ||
| CMakeLists.txt | ||
| Kconfig | ||
| Kconfig.aspeed | ||
| Kconfig.gd32 | ||
| Kconfig.intel_socfpga | ||
| Kconfig.lpc_syscon | ||
| Kconfig.mchp_mss | ||
| Kconfig.mmio | ||
| Kconfig.npcx | ||
| Kconfig.numaker | ||
| Kconfig.nxp_rstctl | ||
| Kconfig.rpi_pico | ||
| Kconfig.stm32 | ||
| reset_ast10x0.c | ||
| reset_gd32.c | ||
| reset_intel_socfpga.c | ||
| reset_lpc_syscon.c | ||
| reset_mchp_mss.c | ||
| reset_mmio.c | ||
| reset_npcx.c | ||
| reset_numaker.c | ||
| reset_nxp_rstctl.c | ||
| reset_rpi_pico.c | ||
| reset_stm32.c | ||