zephyr/arch/xtensa
Daniel Leung 0d7bdbc876 xtensa: use highest available EPC/EPS regs in restore context
There may be Xtensa SoCs which don't have high enough interrupt
levels for EPC6/EPS6 to exist in _restore_context. So changes
these to those which should be available according to the ISA
config file.

Fixes #30126

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-05 10:31:45 -08:00
..
core xtensa: use highest available EPC/EPS regs in restore context 2021-01-05 10:31:45 -08:00
include xtensa: add support for thread local storage 2020-10-24 10:52:00 -07:00
CMakeLists.txt license: cleanup: add SPDX Apache-2.0 license identifier 2019-04-07 08:45:22 -04:00
Kconfig kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00