Add the SPI bus DTS generation to the FE310 and the SiFive Freedom SoC. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> |
||
|---|---|---|
| .. | ||
| arc | ||
| arm | ||
| bindings | ||
| common | ||
| nios2 | ||
| riscv32 | ||
| x86 | ||
| xtensa | ||
| Kconfig | ||
Add the SPI bus DTS generation to the FE310 and the SiFive Freedom SoC. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> |
||
|---|---|---|
| .. | ||
| arc | ||
| arm | ||
| bindings | ||
| common | ||
| nios2 | ||
| riscv32 | ||
| x86 | ||
| xtensa | ||
| Kconfig | ||