Dat Nguyen Duy e4539aa9c9 board: s32z2xxdc2: allow the code to be executed from code RAM ... - Trace32 runner: no need to configure TE bit in CFG_CORE register in the cmm start-up script, it can be configured at Zephyr start-up code when required (via SCTRL register) - MPU static regions also needs to be updated for XIP and non-XIP Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>		2024-11-26 15:43:45 -05:00
..
CMakeLists.txt
Kconfig	soc: nxp: s32ze: add support eDMA3 for S32Z270	2024-10-18 14:16:05 +02:00
Kconfig.defconfig	soc: s32ze: clean up cache initialization	2024-11-26 15:43:45 -05:00
Kconfig.soc
mpu_regions.c	board: s32z2xxdc2: allow the code to be executed from code RAM	2024-11-26 15:43:45 -05:00
pinctrl_soc.h	soc: dts: pinctrl: support the configurations which apply for LVDS pads	2024-10-21 12:39:04 +02:00
soc.c	soc: s32ze: clean up cache initialization	2024-11-26 15:43:45 -05:00
soc.h	drivers: counter: nxp: convert STM to native driver	2024-08-05 07:35:57 -05:00