zephyr/soc/adi/max32
Maureen Helm 398d9e3d49 soc: adi: max32: Enable primary core to configure/start secondary core
Adds support for the primary m4 core to configure the boot address and
start the clock for the secondary risc-v core. Unlike the msdk which
defers this function to applications and requires users to copy/paste
code from an msdk example application into their own application, in
zephyr it is implemented in the common soc init routine of the primary
core. It can be enabled/disabled and configured with Kconfig symbols and
a devicetree chosen node, allowing applications to override board-level
defaults if desired using overlays instead of modifying zephyr code.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2025-01-29 17:55:32 +01:00
..
common
CMakeLists.txt soc: adi: max32: Add. shared section for MAX7800X SoC 2025-01-22 20:47:21 +01:00
flash.ld soc: adi: Extract max32 flashprog section to a dedicated linker script 2024-10-22 20:39:41 +02:00
Kconfig soc: adi: max32: Enable primary core to configure/start secondary core 2025-01-29 17:55:32 +01:00
Kconfig.defconfig soc: adi: Add the MAX78002 SoC 2024-11-16 15:09:57 -05:00
Kconfig.defconfig.max32655
Kconfig.defconfig.max32662
Kconfig.defconfig.max32666
Kconfig.defconfig.max32670
Kconfig.defconfig.max32672
Kconfig.defconfig.max32675
Kconfig.defconfig.max32680
Kconfig.defconfig.max32690
Kconfig.defconfig.max78000 soc: adi: Add the MAX78000 SoC 2025-01-22 20:47:21 +01:00
Kconfig.defconfig.max78002 soc: adi: Add the MAX78002 SoC 2024-11-16 15:09:57 -05:00
Kconfig.soc soc: adi: max32: Refactor core configuration 2025-01-29 17:55:32 +01:00
max7800x.ld soc: adi: max32: Add. shared section for MAX7800X SoC 2025-01-22 20:47:21 +01:00
soc.c soc: adi: max32: Enable primary core to configure/start secondary core 2025-01-29 17:55:32 +01:00
soc.h
soc.yml soc: adi: Add the MAX78000 SoC 2025-01-22 20:47:21 +01:00