Shawn Nematbakhsh c74526919d soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS. ... Rather than specify input clock for each peripheral individually, instead specify the relevant clocks in DTS. This will enable easier support for non-default coreclk on fe310 in a follow-up CL. Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>		2022-04-05 12:00:03 +02:00
..
arc	everywhere: fix typos	2022-03-14 20:22:24 -04:00
arm	dts: stm32: add SDMMC for STM32F4	2022-04-05 11:17:08 +02:00
arm64	nxp: imx: support i.MX8MP EVK board	2022-03-14 11:28:35 +01:00
bindings	soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.	2022-04-05 12:00:03 +02:00
common
nios2	dts: rename 'nios2,i2c' compatible to 'altr,nios2-i2c'	2021-08-17 17:51:57 -04:00
posix
riscv	soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.	2022-04-05 12:00:03 +02:00
sparc	dts: sparc: add cpus node to leon3	2022-01-11 10:46:20 +01:00
x86	dts/x86: Add VT-D node on Elkhart Lake	2022-01-07 10:47:27 -05:00
xtensa	soc/cavs: Fix warning in intel_cavs.dtsi	2022-04-01 09:12:20 -04:00
binding-template.yaml
Kconfig