Flavio Ceolin 6c6495bb43 xtensa: mmu: Fix rasid initial value ... RASID must not use 0 for any slot. According with documentation: """The operation of the processor is undefined if any two of the four ASIDs are equal or if it contains an ASID of zero""" Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>		2024-03-14 13:24:41 -05:00
..
core	xtensa: mmu: Fix rasid initial value	2024-03-14 13:24:41 -05:00
include	arch: xtensa: save/restore HiFi AudioEngine regs	2024-03-05 10:57:33 +01:00
CMakeLists.txt	xtensa: userspace: Warning about impl security	2023-11-21 15:49:48 +01:00
Kconfig	xtensa: use CONFIG_PRIVILEGED_STACK_SIZE for stack size	2024-03-08 09:37:36 +01:00