c1711997bc
Adds Xtensa as supported architecture for coredump. Fixes a few typos in documentation, Kconfig and a C file. Dumps minimal set of registers shown by 'info registers' in GDB for the sample_controller and ESP32 SOCs. Updates tests. Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
9 lines
217 B
Plaintext
9 lines
217 B
Plaintext
# Copyright (c) 2017 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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config SOC_XTENSA_SAMPLE_CONTROLLER
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bool "Xtensa sample_controller core"
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select XTENSA
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select XTENSA_HAL
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select ARCH_SUPPORTS_COREDUMP
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