zephyr/dts/arm/infineon/cat3/xmc
Andriy Gelman fb635f6327 soc: arm: infineon_xmc: Use cacheable flash address space
The infineon xmc4xxx series has two ways to access flash: one is the
cacheable address space at 0x8000000 which may return pre-fetched/cached
data to reduce flash access latency, the second is non-cached space
at 0xc000000 which is mainly used for write and erase operations.

Currently the LMA is set to the non-cachable address which is not
efficient for executing in place (XIP). Instead use the cacheable
address for the LMA.

Even though the cacheable address is used for the LMA, the J-Link
probe properly figures that it has to use non-cached space for erasing
and writing to flash.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2025-02-11 03:06:28 +01:00
..
xmc4xxx.dtsi soc: arm: infineon_xmc: Use cacheable flash address space 2025-02-11 03:06:28 +01:00
xmc4500_F100x1024-intc.dtsi
xmc4500_F100x1024-pinctrl.dtsi
xmc4500_F100x1024.dtsi soc: arm: infineon_xmc: Use cacheable flash address space 2025-02-11 03:06:28 +01:00
xmc4700_F144x2048-intc.dtsi
xmc4700_F144x2048-pinctrl.dtsi
xmc4700_F144x2048.dtsi soc: arm: infineon_xmc: Use cacheable flash address space 2025-02-11 03:06:28 +01:00