Commit Graph

1658 Commits

Author SHA1 Message Date
Andy Ross
c2339db996 tests/timer_api: Correct precision and fix correctness mistakes
Correct a bunch of precision/analysis errors in this test:

* Test items weren't consistent about tick alignment and resetting of
  the timestamp, so put these steps into init_timer_data() and call
  that immediately before k_timer_start().

* Many items would calculate the initial timestamp AFTER
  k_timer_start(), leading to an extra (third!) point where the timer
  computation could alias by an extra tick.  Always do this
  consistently before the timer is started (via init_timer-data()).

* Tickless systems with high tick rates can easily advance the system
  uptime while the timer ISR is running, so the system can't expect
  perfect accuracy even there (this test was originally written for
  ticked systmes where the ISR was by definition happening "at the
  same time").

  (Unfortunately our most popular high tick rate tickless system,
  nRF5, also has a clock that doesn't divide milliseconds exactly, so
  it had a special path through all these precision comparisons and
  avoided the bugs.  We finally found it on a x86 HPET system with 10
  kHz ticks.)

* The interval validation was placing a minimum bound on the interval
  time but not a maximum (this mistake was what had hidden the failure
  to reset the timestamp mentioned above).

Longer term, the millisecond precision math in these tests is at this
point an out of control complexity explosion.  We should look at
reworking the core OS tests of k_timer to use tick precision (which is
by definition exact) pervasively and leave the millisecond stuff to a
separate layer testing the alternative/legacy APIs.

Fixes #31964 (probably -- that was reported against up_squared, on
which I had trouble reproducing, but it was a common failure on
ehl_crb).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-02-16 12:08:36 -05:00
Daniel Leung
ce44048d46 x86: rename CONFIG_SSE* to CONFIG_X86_SSE*
This adds X86 keyword to the kconfigs to indicate these are
for x86. The old options are still there marked as
deprecated.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-02-15 08:21:15 -05:00
Daniel Leung
735c0096ae tests: fpu_sharing: test both FPU and SSE on x86
On x86, it is possible to use FPU (387) and SSE for floating
point operations. So test both.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-02-15 08:21:15 -05:00
Ioannis Glaropoulos
2573f4b99c tests: remove nrf5340 PDK boards from test .yml files
Remove references to the nRF5340 PDK boards
from samples and tests .yml files.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-15 07:59:43 -05:00
Andy Ross
015b4f7303 tests/kernel: Coherence: no shared data on stacks
A fairly common idiom in our test code is to put test-local data
structures onto the stack, even when they are to be used from another
thread.  But stacks are incoherent memory on some platforms, which
means that such things may not get a consistent view of memory between
threads.

Just make these things static.  A few of these spots were causing test
failures on intel_adsp_cavs15.  More were found by inspection while
hunting for mistakes.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-02-11 14:47:40 -05:00
Andy Ross
95bcba5946 tests/kernel/thread_stack: Fix KERNEL_COHERENCE interactions
Thread stack memory on coherence platforms needs to be linked into a
special section (so it can be cached).

Also, the test_idle_stack case just can't work with coherence.  It's
measuring the CPU's idle stack's unused data, which was initialized at
boot from CPU0, and not necessarily the CPU on which the test is
running.  In practice on intel_adsp_cavs15, our CPU has stale zeroes
in the cache for its unused stack area (presumably from a firmware
memory clear at boot or something?).  Making this work would require a
cache invalidate on all CPUs at boot time before the idle threads
start, we can't do it here in the test because we don't know where the
idle stack pointer is.

Too much work for an esoteric stack size test, basically.  Just
disable on these platforms.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-02-11 14:47:40 -05:00
Daniel Leung
89a9096334 tests: threads/tls: add more thread variables
It was discovered that TLS data/bss in stack need to be
aligned correctly or else incorrect variables would be
accessed. This makes tdata and tbss sections to have
odd sizes to make sure everything still works.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-02-07 23:28:43 -05:00
Enjia Mai
8474d785f4 tests: memory protect: add some error test cases
Add some error case for initializing memory domain and removing
memory partition.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2021-02-05 08:29:44 -05:00
Andy Ross
4d4a636555 tests/kernel/common: Skip the printk test when not applicable
When CONFIG_LOG_PRINTK is set, the printk hook mechanism doesn't exist
and this test can't pass.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-02-03 20:56:14 -05:00
Andy Ross
782c121dd3 tests/sched/deadline: Fix precision rollover
The deadline scheduler as of commit ef626571b2 ("kernel/sched:
Optimize deadline comparison") got an optimization that requires that
the the cycle difference of the deadline time of the "first" and
"last" runnable thread never be higher than 2^31.

The test code here was masking off the bottom 31 bits of the generated
deadlines, so it looked OK.  But because the actual setting of the
deadline values takes time too, it was still possible to select values
that would roll over.  The window was VERY small, but the RNG on one
platform (up_squared) hit it.

Shrink the selected deadlines to live in a 30 bit space for safety.

Fixes #31508

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-02-03 13:10:33 -05:00
Daniel Leung
890e9846c8 Revert "tests: context: disable if DEMAND_PAGING"
This reverts commit 79d73063af.
The issue #31333 is fixed so this can be reverted to
enable tests/kernel/context to run with demand paging enabled.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-02-02 21:57:43 -05:00
Daniel Leung
d19307fa45 tests: mem_protect: fix failing inheritance test under SMP
The inheritance test first creates a parent thread, and then
creates a child thread inside this parent thread. At the same
time inside the main thread, a resource pool is assigned to
the parent thread. However, when under SMP, it is possible
that the pool assignment is done between both parent/child
threads are getting pointers to the pool, due to multiple
threads are running. So when doing pool pointer comparison,
there is a mismatch between those pointers (like parent has
a null pool pointer while child is pointing to the actual
pool), and thus failing the test. So fix this by delaying
the parent from running under after pool assignment is done.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-02-02 14:00:01 -05:00
Daniel Leung
af37e9d999 tests: mem_map: fix execution test for x86_64 with coverage
When coverage is enabled on x86_64, GCC uses relative addressing
to increment the gcov counters. The generated code of the test
function assumes execution is in the same location where
the linker places the test function. This does not work with
the execution test as it copies the function into another part
of memory and tries to execute from there. When the copied
function starts to run, the instruction pointer is at the newly
copied function. So any relative addressing with regard to
the instruction pointer now is invalid. Instead of
<generated code RIP + offset> for gcov counter as it should be,
now the copied code is trying to access the counter at
<copied code RIP + offset>, which points to incorrect
memory location (and possibly invalid/non-mapped memory).
To fix this, we need to tell GCC not to use relative addressing.
This can be accomplished by telling GCC to use the large memory
model. This is only used for this test as this option increases
code size quite a bit, and should not be used in general.

Fixes #30434

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-02-02 13:59:41 -05:00
Daniel Leung
1f62817e43 tests: mem_map: put transplanted_function into its own section
This puts the transplanted_function into its own section so that
z_phys_map() can correctly map the whole range of memory used
by the function, in case someone decides to expand the function
to be bigger than a MMU page.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-02-02 13:59:41 -05:00
Enjia Mai
8595a390a7 tests: msgq: Fix uncheck return value of coverity scan
Add a return value check of message queue test cases, to fix
issue #31680, which is for CID :216795.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2021-02-01 20:33:51 -05:00
Peter Bigot
c72e2320e4 tests: exclude nrf5340dk_nrf5340_cpunet when CONFIG_PM=y
The required regulator control features are only available on the
application core.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-02-01 15:05:03 -05:00
Daniel Leung
3740f60631 tests: mem_protect: use MP_NUM_CPUS instead of SMP
The test_mem_domain_migration test creates a new thread with
different priority based on whether SMP is enabled. This causes
an issue where SMP=y and MP_NUM_CPUS=1 where the spin_entry()
would spin forever (with k_busy_wait()) and not yielding since
it has cooperative priority. Fix this by using MP_NUM_CPUS to
figure out which priority to use, as it is valid configuration
to have SMP=y and MP_NUM_CPUS=1.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-29 19:37:25 -05:00
Flavio Ceolin
be2f447f61 tests: schedule_api: Improve log on error
Increase thread counter before the assert, otherwise in case of fail
the output will give the impression that the same thread ran more than
once.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-27 16:55:58 -05:00
Flavio Ceolin
e34f104693 tests: schedule_api: Do not mess ms with ticks
TASK_SWITCH_TOLERANCE is set in ms but it was being used directly as
ticks.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-27 16:55:58 -05:00
Andy Ross
2f6b202ed5 tests/schedule_api: Correct tick/ms math for non-divisible clocks
Adjusting the tick alignment of this test caused it to start breaking
on nRF5 platforms, which use a 32768 Hz clock that doesn't divide
evenly into the millisecond precision used by the test.  The "half
slice" math ended up being wrong by a bit.

Convert to ticks first before computing the cycle delay needed.

Fixes #29705

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-01-27 16:55:58 -05:00
Watson Zeng
f71cd2aaf5 spinlock: validate: fix the dependency with MP_NUM_CPUS
the implementation of spinlock validation uses two LSB bits in the
bottom of a pointer union to store a CPU index, which only has space
for 4 CPUS. the MP_NUM_CPUS should be <= 4.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-01-26 08:43:45 -05:00
Krzysztof Chruscinski
7f08061f0c logging: Revamp menuconfig
Clean up logging menuconfig by grouping configuration into
sections like: mode, processing configuration, backends.

Additionlly, removed LOG_ENABLE_FANCY_OUTPUT_FORMATTING which is no
longer in use.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-01-26 06:15:42 -05:00
Enjia Mai
e89fe33a5a tests: thread: refine the thread abort test case
Refine the thread abort test case and add one extra condition.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2021-01-24 14:18:00 -05:00
Jian Kang
30bf585e10 tests: kernel: Add some testcases for thread
Add some error condition of testcases to verify whether the
robustness of API. Such as give a NULL to some API and check
the response if get result that we were expacted.

Signed-off-by: Jian Kang <jianx.kang@intel.com>
2021-01-24 14:13:29 -05:00
Andrew Boie
14c5d1f1f7 kernel: add CONFIG_ARCH_MAPS_ALL_RAM
Some arches like x86 need all memory mapped so that they can
fetch information placed arbitrarily by firmware, like ACPI
tables.

Ensure that if this is the case, the kernel won't accidentally
clobber it by thinking the relevant virtual memory is unused.
Otherwise this has no effect on page frame management.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
6c97ab3167 mmu: promote public APIs
These are application facing and are prefixed with k_.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
79d73063af tests: context: disable if DEMAND_PAGING
Until #31333 is resolved, the periodic timer in the eviction
algorithm interacts with this test in such a way that the system
deadlocks.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
c7be5dddda mmu: backing stores reserve page fault room
If we evict enough pages to completely fill the backing store,
through APIs like k_mem_map(), z_page_frame_evict(), or
z_mem_page_out(), this will produce a crash the next time we
try to handle a page fault.

The backing store now always reserves a free storage location
for actual page faults.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
cad944e259 tests: demand_paging: add more API tests
Add remaining APIs in mem_manage.h even though not all have
been promoted to public (yet).

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
60d306642e kernel: add z_num_pagefaults_get()
Simple counter of number of successfully handled page faults by
the core kernel.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
ef65597b73 tests: add intial demand paging testcase
More to be added, but for now show that we can map more
anonymous memory than we physically have, and that reading/
writing to it works as expected.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
146eaf4335 tests: add basic k_mem_map() test
Show we can measure free memory properly and map a page of
anonymous memory, which has been zeroed and is writable.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
d50b2419b8 tests: mem_map: pin test pages
These get mapped to multiple virtual addresses and must be
pinned.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
893822fbda arch: remove KERNEL_RAM_SIZE
We don't map all RAM at boot any more, just the kernel image.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Ying ming
9625576b3c test: scheduling :add new conf file
Add a conf file to make sure the kernel will use simple linked-list
ready queue as scheduling algorithm. This operation will increase module
testcase coverage and z_priq_dumb_add z_prj_dum_remove function are
called.

Signed-off-by: Ying ming <mingx.ying@intel.com>
2021-01-23 11:04:51 -05:00
Anas Nashif
d95a5f9b35 tests: fifo: exclude m2gl025_miv
Excluding while we figure out the issue with this failing sporadically.
See bug #31549.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-23 00:42:13 -05:00
Anas Nashif
e6d3fc6700 test: schedule_api: increase timeout
Some qemu plaforms might need some more time.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-23 00:42:13 -05:00
Alexey Brodkin
c1d5229549 Revert "tests: Exclude qemu_arc{em|hs} in some"
This reverts commit b98058ecd0.

With icount finally working in QEMU for ARC these tests start to
pass reliably, so no need to exclude them any longer.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2021-01-23 00:42:13 -05:00
Alexey Brodkin
3cd64c91bd Revert "tests: exclude qemu_arc_hs in lifo_usage test"
This reverts commit 6f4f5b1fe5.

With icount finally working in QEMU for ARC these tests start to
pass reliably, so no need to exclude them any longer.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2021-01-23 00:42:13 -05:00
Alexey Brodkin
47944bd12e Revert "tests: kernel: lifo_usage: Exclude on qemu_arc_em"
This reverts commit 27d42f060d.

With icount finally working in QEMU for ARC these tests start to
pass reliably, so no need to exclude them any longer.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2021-01-23 00:42:13 -05:00
Ioannis Glaropoulos
b0a85fb855 tests: kernel: thread: increase heap mem pool size
Increase the heap memory pool size in the
prj_armv8m_mpu_stack_guard.conf, to match
the value in the default configuration in
proj.conf (and fix an out-of memory issue
when allocating a kernel object).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-01-22 12:39:25 -05:00
Flavio Ceolin
321ce7fb77 power: Use substate-id in pm subsystem
Change subsystem to use struct pm_state with substate-id instead of
using only the power state category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
d21808b0b1 power: Remove residency and states from Kconfig
Residency time and power states are defined using device tree now.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
579f7049c7 power: Move pm subsystem to new power states
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Anas Nashif
34e9c09330 Revert "arch: remove KERNEL_RAM_SIZE"
This reverts commit 73561be500.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
6785d2a2dc Revert "tests: mem_map: pin test pages"
This reverts commit 24eb50d7f4.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
cf34c9174a Revert "tests: add basic k_mem_map() test"
This reverts commit 0f8dc1c109.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
6e4b33e8a5 Revert "tests: add intial demand paging testcase"
This reverts commit 060462d5c6.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
c2c87c99c7 Revert "kernel: add z_num_pagefaults_get()"
This reverts commit d7e6bc3e84.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
fb4db2c0a8 Revert "tests: demand_paging: add more API tests"
This reverts commit 7370895c0e.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00