Commit Graph

853 Commits

Author SHA1 Message Date
Stephanos Ioannidis
4a64bfe351 treewide: Use CONFIG_CPP instead of CONFIG_CPLUSPLUS
This commit updates all in-tree code to use `CONFIG_CPP` instead of
`CONFIG_CPLUSPLUS`, which is now deprecated.

Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
2023-01-13 17:42:55 -05:00
Evgeniy Paltsev
93b98fc2de ARC: introduce reworked irq_offload implementation
Use interrupts (with dedicated interrupt line) for irq_offload
instead of exception-based implementation.

That allows to implement IRQ_OFFLOAD without adding special code
to interrupt / exception path for IRQ_OFFLOAD handling and,
moreover, test the real interrupt code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-12-20 22:51:24 +01:00
Siyuan Cheng
5854670b98 DSP: add dsp unit test
add dsp context switch test
add complex multiplication test for ARC processor

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2022-12-19 11:56:55 +01:00
Siyuan Cheng
70ff49af37 DSP: add DSP support for ARC processor
add DSP reg in context switch
add AGU reg in context switch to support XY mem
add thread option and API to dis/enable DSP switch

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2022-12-19 11:56:55 +01:00
Carlo Caione
4b58739034 arc: cache: Rework cache API
And use the new API.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-12-01 13:40:56 -05:00
Carlo Caione
189cd1f4a2 cache: Rework cache API
The cache operations must be quick, optimized and possibly inlined. The
current API is clunky, functions are not inlined and passing parameters
around that are basically always known at compile time.

In this patch we rework the cache functions to allow us to get rid of
useless parameters and make inlining easier.

In particular this changeset is doing three things:

1. `CONFIG_HAS_ARCH_CACHE` is now `CONFIG_ARCH_CACHE` and
   `CONFIG_HAS_EXTERNAL_CACHE` is now `CONFIG_EXTERNAL_CACHE`

2. The cache API has been reworked.

3. Comments are added.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-12-01 13:40:56 -05:00
Evgeniy Paltsev
d9b3efa550 ARC: cleanup & modify _st32_huge_offset as it becomes widely used
As we start to use _st32_huge_offset in other places (i.e DSP code)
introduce optimized version with address shifted instruction which
doesn't produce extra instruction.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-29 09:48:31 +01:00
Evgeniy Paltsev
ae79de1930 ARC: MWDT add TLS support
Add thread local storage support for ARC MWDT toolchain.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-29 09:48:23 +01:00
Evgeniy Paltsev
d2488d2160 ARC: control shared (common) interrupts via IDU
Control shared interrupts enabling/disabling via IDU.
With that we can easily enable and disable them for all cores
in one place.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-28 17:44:54 +01:00
Evgeniy Paltsev
761be25c43 ARC: make ARC_MP_PRIMARY_CPU_ID definition public
Make ARC_MP_PRIMARY_CPU_ID definition public so it can be used in
other ARC code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-28 17:44:54 +01:00
Evgeniy Paltsev
93049141f9 ARC: TLS: cleanup tls register setup
Cleanup tls register setup marcos by using generic one.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-28 17:44:20 +01:00
Evgeniy Paltsev
cae6696a75 ARC: ARCv2: GCC: restore default TLS behavior for all SDKs
In 0.15.2 SDK we specify r26 as default register for TLS cached
pointer, so it isn't used by compiler even if TLS support isn't
enabled. Restore the previous behavior - so if we don't use
TLS in Zephyr the register isn't stay reserved.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-28 17:44:13 +01:00
Keith Packard
10294269f7 arch/arc: Detect arcv2 TLS register automatically
The compiler defines __ARC_TLS_REGNO__ as the number of the
register used for TLS variables. Use that instead of hard-coding
a specific register.

Signed-off-by: Keith Packard <keithp@keithp.com>
2022-11-08 10:45:44 +01:00
Kumar Gala
c7fe428df3 arch: arc: Convert to CONFIG_MP_MAX_NUM_CPUS
Convert CONFIG_MP_NUM_CPUS to CONFIG_MP_MAX_NUM_CPUS as we work on
phasing out CONFIG_MP_NUM_CPUS.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-11-02 14:35:32 -04:00
Evgeniy Paltsev
3d24a07c6b ARC: disallow build for secure configuration with firq
Such configuration isn't supported by HW.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-02 15:42:00 +09:00
Kumar Gala
a1195ae39b smp: Move for loops to use arch_num_cpus instead of CONFIG_MP_NUM_CPUS
Change for loops of the form:

for (i = 0; i < CONFIG_MP_NUM_CPUS; i++)
   ...

to

unsigned int num_cpus = arch_num_cpus();
for (i = 0; i < num_cpus; i++)
   ...

We do the call outside of the for loop so that it only happens once,
rather than on every iteration.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-21 13:14:58 +02:00
Kumar Gala
fc95ec98dd smp: Convert #if to use CONFIG_MP_MAX_NUM_CPUS
Convert CONFIG_MP_NUM_CPUS to CONFIG_MP_MAX_NUM_CPUS as we work on
phasing out CONFIG_MP_NUM_CPUS.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-20 22:04:10 +09:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Kumar Gala
c778eb2a56 smp: Move arrays to use CONFIG_MP_MAX_NUM_CPUS
Move to use CONFIG_MP_MAX_NUM_CPUS for array size declarations instead
of CONFIG_MP_NUM_CPUS.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-17 14:40:12 +09:00
Ruud Derwig
9bccb5cc4b ARC: fx possible memory corruption with userspace
Use  Z_KERNEL_STACK_BUFFER instead of
Z_THREAD_STACK_BUFFER for initial stack.

Fixes #50467

Signed-off-by: Ruud Derwig <Ruud.Derwig@synopsys.com>
2022-09-21 18:46:06 +00:00
Stephanos Ioannidis
40bbf78d77 arch: arc: Rename ARC64 output format to elf64-littlearc64
This commit renames the ARC64 output format from `elf64-littlearc` to
`elf64-littlearc64` as required by the updated ARC patches for the GCC
12.1 release.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-08-29 16:57:18 +02:00
Evgeniy Paltsev
99142065fc ARC: add non-multithreading mode support
Add non-multithreading mode support for all ARC non-SMP
targets.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-08-26 21:38:56 -04:00
Carlo Caione
4806e1087e cache: Fix cache API calling from userspace
When a cache API function is called from userspace, this results on
ARM64 in an OOPS (bad syscall error). This is due to at least two
different factors:

- the location of the cache handlers is preventing the linker to
  actually find the handlers
- specifically for ARM64 and ARC some cache handling functions are not
  implemented (when userspace is not used the compiler simply optimizes
  out these calls)

Fix the problem by:

- moving the userspace cache handlers to a their logical and proper
  location (in the drivers directory)
- adding the missing handlers for ARM64 and ARC

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-08-23 10:14:17 +02:00
Evgeniy Paltsev
6ce3c531d8 ARC: ARcv3: 64bit: manage accumulator reg properly
In case of ARCv3 64 bit we have only one 64bit accumulator
register instead of register pair, so fixup register
save & restore code.

While we at it also make ARC_HAS_ACCL_REGS option (which
controls accumulator reg/regs save & restore) default
for HS5x and HS6x as well - as it should be.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-08-19 12:09:37 +02:00
Carlo Caione
4932f92457 arch: arc: Fix cache-related Kconfig symbols
Switch to the new cache-related Kconfig symbols.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-08-18 11:30:49 +00:00
Gerard Marull-Paretas
92b855f9de arch: arc: remove unused <soc.h>
Header was not used, so remove it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Gerard Marull-Paretas
b2a1eeb6ac soc: arc: define ICI in DT
ICI (Inter-Core Interrupt Unit) interrupts and priorities were hardcoded
in C files. This patch moves this information to Devicetree and updates
code to make use of it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
Evgeniy Paltsev
1bc2cb7fd7 ARC: fix SMP race in ASM ARC interrupt handling code
In interrupt chandler code we don't save full current task context
on stack (we don't save callee regs) before z_get_next_switch_handle()
call, but we passing _current to it, so z_get_next_switch_handle
saves current task to switch_handle, which means that this CPU
current task can be picked by other CPU before we fully store it
context on this CPU.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-07-20 09:26:24 -05:00
Carlo Caione
b07907057b arc: vector_table: Automatically place the IRQ vector table
Instead of using a custom linker script, rely on the automatic placement
of the IRQ vector table.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-06-28 12:29:42 +02:00
Evgeniy Paltsev
1b1d328101 ARC: define PROPERTY_OUTPUT_FORMAT for all ARC elf formats
Now we define PROPERTY_OUTPUT_FORMAT (which is used for
binutils) only for ARCv3 32 bit. Let's define it for all
ARC elf formats instead of relying on default values.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev
fa5bfb5880 ARC: ARCv3: MWDT: provide required options for building with mwdt
Provide required compiler/assembler options for building with mwdt
toolchain for ARCv3 64 bit.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev
48301dde0f ARC: ARCv3: add HS5x support
Add HS5x CPU support - ARCv3 32bit ISA.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Gerard Marull-Paretas
4b91c2d79f asm: update files with <zephyr/...> include prefix
Assembler files were not migrated with the new <zephyr/...> prefix.
Note that the conversion has been scripted, refer to #45388 for more
details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas
16811660ee arch: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all arch code to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:22 +02:00
Evgeniy Paltsev
9ce0d31c33 ARC: SMP: debug: workaround MDB changing debug_select value
MDB debugger may modify debug_select and debug_mask registers
on start, so we can't rely on debug_select reset value.

Let's set correct value on primary CPU without reading initial
value from debug_select.

Internal ID: P10019563-50516

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-04-29 12:34:21 +02:00
Nazar Kazakov
f483b1bc4c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-18 13:24:08 -04:00
Nazar Kazakov
9713f0d47c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-14 20:22:24 -04:00
Gerard Marull-Paretas
dffaf5375c kconfig: tweak Kconfig prompts
Tweak some Kconfig prompts after the removal of "Enable...".

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-09 15:35:54 +01:00
Gerard Marull-Paretas
95fb0ded6b kconfig: remove Enable from boolean prompts
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:

sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-09 15:35:54 +01:00
Carles Cufi
e83a13aabf kconfig: Rename the TEST_EXTRA stack size option to align with the rest
All stack sizes should end with STACK_SIZE.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-02-22 08:23:05 -05:00
Daniel Leung
de9f396854 arc: remove @return doc for void functions
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-12 16:02:16 -05:00
Yuguo Zou
abeaf94855 soc: arc: fix ARC_HAS_ACCL_REGS settings
ARC_HAS_ACCL_REGS should set to y to protect ACCL and ACCH registers
during irq. These registers could be used as GPRs by compilers and
therefore need store/restore during irq.

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2021-12-02 11:32:14 -06:00
Flavio Ceolin
7dd4297214 pm: Remove unused parameter
The number of ticks on z_pm_save_idle_exit is not used and there is
no need to have it.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-11-17 11:15:49 -05:00
Andy Ross
c815996606 arch/arc: Add hook for CONFIG_SCHED_THREAD_USAGE accounting in ISRs
Call into z_thread_usage_stop() before ISR entry to avoid including
interrupt handling totals in thread usage stats.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-11-08 21:32:20 -05:00
Evgeniy Paltsev
a7d07cb62c ARC: forbid FIRQ or multiple register banks w/ 1 IRQ priority level
Don't allow to enable multiple register banks / fast
interrupts if we have only one interrupt priority level.

NOTE: we duplicate some checks by adding dependencies to ARC
Kconfig and adding build-time checks in C code. We do it
intentionally as for some reason we can violate dependencies
in architecture-level Kconfig by adding incorrect default in
SoC-level Kconfig. Such violation happens without any
warnings / errors from the Kconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-10-13 20:41:29 -04:00
Evgeniy Paltsev
60fdec616b ARC: MWDT: get rid of MWDT startup libs
__cxa_atexit implementation provided by MWDT startup code calls
malloc which isn't supported right now. As we don't support
calling static destructors in Zephyr let's provide our own
__cxa_atexit stub and get rid of MWDT startup libs
entirely.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-09-01 17:08:32 -04:00
Yuguo Zou
eb14e21d18 arch: arc: add support of mpu v6
Add support of ARC mpu v6
* minimal region size down to 32 bytes
* maximal region number up to 32
* not support uncacheable region and volatile uncached region
* clean up mpu code for better readablity

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2021-08-27 11:45:43 -04:00
Yuguo Zou
333501e871 arch: arc: add support of mpu v3
Add support of ARC mpu version 3 which can have region size down to 32
bytes

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2021-08-27 11:45:43 -04:00
Evgeniy Paltsev
44e53eeacf ARC: MWDT: fix SMP build for MWDT toolchain
Metaware assembler doesn't accept '@' symbol in the beginning
of symbol name like GNU does.

Drop excessive '@' for _curr_cpu symbol.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-08-10 07:36:25 -04:00
Evgeniy Paltsev
7ca190c20f ARC: 64BIT: Kconfig increase stacks sizes for 64bit platforms
Increase default stacks sizes for 64bit platforms where it is
required.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-08-07 20:36:23 -04:00