This CL configures the UART wake-up event triggered from a falling edge
(START condition) on CR_SIN pin. It also includes:
1. Introduce wui_maps property in yaml file to present relationship
between Wake-Up Input (WUI) and UART device.
2. Implement wake-up mechanism by MIWU api functions.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add gpio support for Nuvoton NPCX series. This CL includes:
1. Add GPIO device tree declarations.
2. Introduce wui_maps property in yaml file to present relationship
between Wake-Up
Input (WUI) and 8 IOs belong to the device.
3. Zephyr GPIO api implementation.
4. GPIO callback functions implementation with MIWU api functions.
5. Overlay file for gpio basic tests
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The device Multi-Input Wake-Up Unit (MIWU) supports the embedded
controller (EC) to exit 'Sleep' or 'Deep Sleep' power state which allows
chip has better power consumption. Also, it provides signal conditioning
such as 'Level' and 'Edge' trigger type and grouping of external
interrupt sources of NVIC. The NPCX series has three identical MIWU
modules: MIWU0, MIWU1, MIWU2. Together, they support a total of over 140
internal and/or external wake-up sources.
In this CL, we use device tree files to present the relationship bewteen
MIWU and the other devices in different npcx series. For npcx7 series,
it include:
1. npcx7-miwus-int-map.dtsi: it presents relationship between MIWU group
and NVIC interrupt in npcx7. Please notice it isn't 1-to-1 mapping.
2. npcx7-miwus-wui-map.dtsi: it presents relationship between input of
MIWU and its source device such as gpio, timer, eSPI VWs and so on.
This CL also includes:
1. Add MIWU device tree declarations.
2. MIWU api function declarations and implementation to configure signal
conditions and callback function mechanism. They can be be classified
into two types. One is for GPIO which connects original gpio callback
implemetation and the other is for generic devices such as timer,
eSPI, and so on.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The driver utilizes the CONFIG_NET_OFFLOAD setting to avoid the
normal handling of IP packets, and instead uses a socket-like
UART interface to handle incoming and outgoing data via AT commands.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This commit adds a node for the ASMedia 2364 controller that acts as an
I2C master on the I2C0 bus. This node contains the GPIO used by the MCU
to notify the ASM2364 that data are available to read.
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
This patch adds a DTS binding for the Texas Instruments LP5030 and
LP5036 I2C LED controllers. They are respectively providing up to 30
and 36 channels (i.e. 10 or 12 RGB LEDs).
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
The led-controller DT binding gathers some common properties for LED
controllers and for the LED child nodes.
One notable property is "color-mapping" which allows to define a channel
to color mapping for multicolor LEDs.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
By default the I2C timing (I2C_TIMINGR register) of I2C V2 peripheral is
computed depending on clocks at runtime with relatively low precision.
This optional property allows to provide a list of pre-computed values
(typically computed from STM32CubeMX SW tool) instead of using runtime
algorithm.
The precomputed value is only valid for a given clock configuration and
I2C speed setting, so this valid configuration is provided with each
value entry.
Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
The spi_flash_w25qxxdv driver has been superseded by the generic
spi_nor driver for over a year. The only non-refactoring change to
the W25Q driver in the last 18 months was done to support a backport
to 1.14.
All devices supported by spi_flash_w25qxxdv driver are expected to be
supported by the spi_nor driver, using the standard `jedec,spi-nor`
devicetree compatible. No in-tree devicetree files make use of this
driver.
Remove the confusion about which driver to select by removing the
unmaintained redundant driver.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
As a general rule devicetree properties should correspond to hardware
description or configuration. In cases where a Zephyr driver receives
instance-specific configuration data from a devicetree property that
property should be marked as being Zephyr-specific. Rename
concat-buf-size to zephyr,concat-buf-size to follow this guideline.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The Nordic TWIM peripheral generates a start condition for each bus
transaction. Devices such as the SSD1306 display and some NXP sensors
can only tolerate the presence of a start condition and device address
after a stop condition. Those devices will not operate correctly when
these signals are observed while the bus is already active. This
motivated the addition of a RAM buffer into which message fragments
could be collected so TWIM can transmit them without injecting
unnecessary start conditions.
However many I2C devices interpret these signals as a repeated start
and ignore them and so function properly without a buffer
concatenating the message fragments.
There is no default for the concat-buf-size property, and the previous
strict requirement for one when performing scatter/gather I/O
transactions broke working drivers for devices that tolerate the
repeated starts. Allow those drivers to work by respecting the
property description and attempting to concatenate messages only if a
buffer in which to place them has been provided.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Added support for hardware flow control in EFM32 UART driver.
Signed-off-by: Timo Dammes <timo.dammes@lemonbeat.com>
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
Use the new SFDP infrastructure to read the supported erase type sizes
and commands from the Basic Flash Parameters block. This removes the
need for explicit reference to most block sizes from this driver.
We're also seeing devices where the page size is not 256 bytes.
Accommodate them.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
With SFDP support we no longer need to get the JEDEC ID or device size
from devicetree. Make them optional in drivers that have been
converted to support SFDP. When runtime SFDP is not enabled the
presence of the required properties will be verified at build-time.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Allow the devicetree binding for a jedec,spi-nor device to provide the
device capabilities by encoding the Serial Flash Discoverable
Parameters Basic Flash Parameters table in the devicetree node. This
supports applications where a specific flash device will be used and
runtime discovery of device capabilities is not desired.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Add IUART driver based on MCUX SDK. This driver is used to provide
serial console support on i.MX8M Mini SoC.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Add devicetree bindings for the Xilinx AXI GPIO v2 IP. This GPIO
controller has an optional "GPIO2" port, which is not always present.
The Xilinx specific devicetree property names and their meaning match a
subset of what can automatically be generated based on the FPGA logic
design using https://github.com/Xilinx/device-tree-xlnx. These
properties are also used by the Linux kernel.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Change the documentation for the arm,dtcm (Data Tightly Coupled Memory)
to reflect that it is not specific to the Cortex-M7 (but also present
on e.g. the Cortex-M1).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add pin controller support for Nuvoton NPCX series
Add pin-mux controller support for Nuvoton NPCX series.
This CL includes:
1. Add pin controller device tree declarations and introduce alt-cells
to select pads' functionality.
2. Add npcx7-alts-map.dtsi since the mapping between IO and controller
is irregular and vary in each chip series.
3. Add nuvoton,npcx-pinctrl-def.yaml and its declarations to change all
pads' functionality to GPIO by default.
4. Pinmux controller driver implementation.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add clock controller support for Nuvoton NPCX series. This CL includes:
1. Add clock controller device tree declarations.
2. Introduce clock-cells in yaml file clock tree to get module's source
clock and turn off/on the its clock
3. Clock controller driver implementation.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The FT5336 driver has been improved and generalized so that multiple
Focaltech touch controllers can be supported using the same single
driver. According to specifications the following list of controller
variants should be supported: FT5x06, FT5606, FT5x16, FT6x06, Ft6x36,
FT5x06i, FT5336, FT3316, FT5436i, FT5336i and FT5x46.
Tested using ER-TFTM028-4 display module (FT6X06).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The EFR32MG21 uses a different kind of clock for watchdogs.
It requires an additional peripheral-id parameter in the dts to get the
proper clock as it is based on the watchdog's ID i.e., cmuClock_WDOG#.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
This commit enables support for parsing 'fixed-link' node when it
is added to node described in 'ethernet,fixed-link.yaml'.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch adds description for 'fixed-link' node in ethernet DTS
node. It supports setting speed and duplex.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit adds the device tree nodes and bindings for the I2C
controllers of the LPC11U6X MCUs
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
This commit adds basic support for the clock controller used in
lpc11u6x MCUs.
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
This commit adds a bindings for the clock controller used in lpc11u6x
MCUs. It also adds a clock-controller node for the lpc11u6x soc series.
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
This patch adds the DT nodes and binding for the pinmux registers,
aka IOCON (I/O control), found on the LPC11U6x MCUs.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Add support for wsen-itds 3-axis accel sensor, provides acceleration,
temperature data reading and supports configuring of output data rate,
operating mode and scale.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
